High Performance Two Port 10/100 Managed Ethernet Switch with
Datasheet
14.2.5.3Port x 1588 Sequence ID, Source UUID
| Offset: | Port 1: 108h | Size: | 32 bits |
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| Port 2: 128h |
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| Port 0: 148h |
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BITS |
| DESCRIPTION |
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| TYPE | DEFAULT |
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31:16 | Sequence ID (SEQ_ID) |
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| RO | 0000h |
| This field contains the Sequence ID from the 1588 Sync or Delay_Req |
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| packet. |
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15:0 | Source UUID High (SRC_UUID_HI) |
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| RO | 0000h | |
| This field contains the high |
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| or Delay_Req packet. |
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| Note: The selection between Sync or Delay_Req packets is based on the corresponding | |||||
| master/slave bit in the 1588 Configuration Register (1588_CONFIG). |
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Note: There are multiple instantiations of this register, one for each port of the LAN9312. Refer to Section 14.2.5 for additional information.
Note: For Port 0(Host MAC), receive is defined as data from the switch fabric, while transmit is to the switch fabric.
SMSC LAN9312 | 203 | Revision 1.4 |
| DATASHEET |
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