High Performance Two Port 10/100 Managed Ethernet Switch with
Datasheet
6.4.4VLAN Support
The switch engine supports 16 active VLANs out of a possible 4096. The VLAN table contains the 16 active VLAN entries, each consisting of the VID, the port membership, and
17 | 16 | 15 | 14 | 13 | 12 11 | ... | 0 | |
Member | Member | Member |
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Port 2 | Port 2 | Port 1 | Port 1 | MII | MII |
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Figure 6.6 VLAN Table Entry Structure
On ingress, if a packet has a VLAN tag containing a valid VID (not 000h or FFFh), the VID table is searched. If the VID is found, the VLAN is considered active and the membership and
On ingress, if a packet does not have a VLAN tag or if the VLAN tag contains VID with a value of 0 (priority tag), the packet is assigned a VLAN based on the Port Default VID (PVID) and Priority. The PVID is then used to access the above VLAN table.
The VLAN membership of the packet is used for ingress and egress checking and for VLAN broadcast domain containment. The
Refer to Section 14.5.3.8, on page 375 through Section 14.5.3.11, on page 378 for detailed VLAN register descriptions.
6.4.5Spanning Tree Support
Hardware support for the Spanning Tree Protocol (STP) and the Rapid Spanning Tree Protocol (RSTP) includes a per port state register as well as the override bit in the MAC Address Table entries (Section 6.4.1.5, on page 64) and the host CPU port special tagging (Section 6.4.10, on page 75).
The Switch Engine Port State Register (SWE_PORT_STATE) is used to place a port into one of the modes as shown in Table 6.2. Normally only Port 1 and Port 2 are placed into modes other than forwarding. Port 0 should normally be left in forwarding mode.
Table 6.2 Spanning Tree States
Port State | Hardware Action | Software Action |
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01 - Blocking | Received packets on the port are | The MAC Address Table should be programmed |
(also used for | discarded. | with entries that the host CPU needs to receive |
disabled) |
| (e.g. the BPDU address). The static and override |
| Transmissions to the port are blocked. | bits should be set. |
| Learning on the port is disabled. | The host CPU should not send any packets to the |
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| port in this state. |
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| The host CPU should discard received packets |
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| from this port when in the Disabled state. |
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| Note: There is no hardware distinction between |
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| the Blocking and Disabled states. |
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Revision 1.4 | 70 | SMSC LAN9312 |
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