High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

14.3.11Host MAC Wake-up Frame Filter Register (HMAC_WUFF)

Offset:

Bh

Size:

32 bits

This write-only register is used to configure the wake-up frame filter. Refer to Section 9.5, "Wake-up Frame Detection," on page 116 for additional information.

BITS

 

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:0

Wake-Up Frame Filter (WFF)

WO

-

 

The Wake-up frame filter is configured through this register using an

 

 

 

indexing mechanism. After power-on reset, digital reset, or soft reset, the

 

 

 

Host MAC loads the first value written to this location to the first DWORD in

 

 

 

the Wake-up frame filter (filter 0 byte mask). The second value written to this

 

 

 

location is loaded to the second DWORD in the wake-up frame filter (filter 1

 

 

 

byte mask) and so on. Once all eight DWORD’s have been written, the

 

 

 

internal pointer will once again point to the first entry and the filter entries

 

 

 

can be modified in the same manner.

 

 

 

Note:

This is a write-only register.

 

 

 

 

 

 

 

SMSC LAN9312

283

Revision 1.4 (08-19-08)

 

DATASHEET