High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

10.2.3.3ERAL (Erase All)

If erase/write operations are enabled in the EEPROM, this command will initiate a bulk erase of the entire EEPROM. The EPC_TIMEOUT bit of the EEPROM Command Register (E2P_CMD) is set if the EEPROM does not respond within 30mS.

EECS

EECLK

EEDO

 

 

 

 

 

 

 

 

 

1

0

0

1

0

 

 

 

 

 

EEDI

Figure 10.8 EEPROM ERAL Cycle

10.2.3.4EWDS (Erase/Write Disable)

After this command is issued, the EEPROM will ignore erase and write commands. To re-enable erase/write operations, the EWEN command must be issued.

EECS

EECLK

EEDO

 

 

 

 

 

 

 

 

 

1

0

0

0

0

 

 

 

 

 

EEDI

Figure 10.9 EEPROM EWDS Cycle

Revision 1.4 (08-19-08)

146

SMSC LAN9312

 

DATASHEET