High Performance Two Port 10/100 Managed Ethernet Switch with
Datasheet
BITS | DESCRIPTION | TYPE | DEFAULT |
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18 | EEPROM Loader Address Overflow (LOADER_OVERFLOW) | RO | 0b |
| This bit indicates that the EEPROM Loader tried to read past the end of the |
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| EEPROM address space. This indicates misconfigured EEPROM data. |
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| This bit is cleared when the EEPROM Loader is restarted with a RELOAD |
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| command, Soft Reset(SRST), or a Digital Reset(DIGITAL_RST). |
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17 | EEPROM Controller Timeout (EPC_TIMEOUT) | R/WC | 0b |
| This bit is set when a timeout occurs, indicating the last operation was |
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| unsuccessful. If an EEPROM ERASE, ERAL, WRITE or WRAL operation is |
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| performed and no response is received from the EEPROM within 30mS, the |
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| EEPROM controller will timeout and return to its idle state. |
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| For the I2C mode, the bit is also set if the EEPROM fails to respond with |
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| the appropriate ACKs, if the EEPROM slave device holds the clock low for |
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| more than 30ms, or if an unsupported EPC_COMMAND is attempted. |
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| This bit is cleared when written high. |
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| Note: When in Microwire mode, if an EEPROM device is not connected, |
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| an internal |
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| and allow timeouts to occur. If EEDI is pulled high externally, EPC |
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| commands will not time out if an EEPROM device is not connected. |
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| In this case the EPC_BUSY bit will be cleared as soon as the |
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| command sequence is complete. It should also be noted that the |
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| ERASE, ERAL, WRITE and WRAL commands are the only EPC |
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| commands that will timeout if an EEPROM device is not present |
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| AND the EEDI signal is pulled low. |
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16 | Configuration Loaded (CFG_LOADED) | RO | 0b |
| When set, this bit indicates that a valid EEPROM was found and the |
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| EEPROM Loader completed normally. This bit is set upon a successful load. |
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| It is cleared on |
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| or at the start of a RELOAD. |
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| This bit is cleared when written high. |
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15:0 | EEPROM Controller Address (EPC_ADDRESS) | R/W | 0000h |
| This field is used by the EEPROM Controller to address a specific memory |
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| location in the serial EEPROM. This address must be byte aligned. |
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SMSC LAN9312 | 199 | Revision 1.4 |
| DATASHEET |
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