High Performance Two Port 10/100 Managed Ethernet Switch with
Datasheet
14.5.3.6Switch Engine ALR Command Status Register (SWE_ALR_CMD_STS)Register #: | 1808h | Size: | 32 bits |
This register indicates the current ALR command status.
BITS | DESCRIPTION | TYPE | DEFAULT |
|
|
|
|
31:2 | RESERVED | RO | - |
|
|
|
|
1 | ALR Init Done | RO | |
| When set, indicates that the ALR table has finished being initialized by the | SS |
|
| reset process. The initialization is performed upon any reset that resets the |
|
|
| switch fabric. The initialization takes approximately 20uS. During this time, |
|
|
| any received packet will be dropped. Software should monitor this bit before |
|
|
| writing any of the ALR tables or registers. |
|
|
|
|
|
|
0 | Make Pending | RO | 0b |
| When set, indicates that the Make Entry command is taking place. This bit | SC |
|
| is cleared once the Make Entry command has finished. |
|
|
|
|
|
|
Note 14.62 The default value of this bit is 0 immediately following any switch fabric reset and then self- sets to 1 once the ALR table is initialized.
SMSC LAN9312 | 373 | Revision 1.4 |
| DATASHEET |
|