High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

14.2.2.5TX FIFO Information Register (TX_FIFO_INF)

Offset:

080h

Size:

32 bits

This register contains the indication of free space in the TX Data FIFO and the used space in the TX Status FIFO.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:24

RESERVED

RO

-

 

 

 

 

23:16

TX Status FIFO Used Space (TXSUSED)

RO

0b

 

This field indicates the amount of space, in DWORD’s, currently used in the

 

 

 

TX Status FIFO.

 

 

 

 

 

 

15:0

TX Data FIFO Free Space (TXFREE)

RO

1200h

 

This field indicates the amount of space, in bytes, available in the TX Data

 

 

 

FIFO. The application should never write more than is available, as indicated

 

 

 

by this value.

 

 

 

 

 

 

SMSC LAN9312

185

Revision 1.4 (08-19-08)

 

DATASHEET