High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

Table 14.12 Indirectly Accessible Switch Control and Status Registers (continued)

REGISTER #

SYMBOL

REGISTER NAME

 

 

 

1C20h

BM_IMR

Buffer Manager Interrupt Mask Register, Section 14.5.4.26

 

 

 

1C21h

BM_IPR

Buffer Manager Interrupt Pending Register, Section 14.5.4.27

 

 

 

1C22h-FFFFh

RESERVED

Reserved for Future Use

 

 

 

SMSC LAN9312

317

Revision 1.4 (08-19-08)

 

DATASHEET