High Performance Two Port 10/100 Managed Ethernet Switch with
Datasheet
14.5.3.2Switch Engine ALR Write Data 0 Register (SWE_ALR_WR_DAT_0)Register #: | 1801h | Size: | 32 bits |
This register is used in conjunction with the Switch Engine ALR Write Data 1 Register (SWE_ALR_WR_DAT_1) and contains the first 32 bits of ALR data to be manually written via the Make Entry command in the Switch Engine ALR Command Register (SWE_ALR_CMD).
BITS | DESCRIPTION | TYPE | DEFAULT |
|
|
|
|
31:0 | MAC Address | R/W | 00000000h |
| This field contains the first 32 bits of the ALR entry that will be written into |
|
|
| the ALR table. These bits correspond to the first 32 bits of the MAC address. |
|
|
| Bit 0 holds the LSB of the first byte (the multicast bit). |
|
|
|
|
|
|
SMSC LAN9312 | 367 | Revision 1.4 |
| DATASHEET |
|