High Performance Two Port 10/100 Managed Ethernet Switch with
Datasheet
14.5.2.18Port x MAC Receive Alignment Error Count Register (MAC_RX_ALIGN_CNT_x)Register #: | Port0: 041Fh | Size: | 32 bits |
| Port1: 081Fh |
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| Port2: 0C1Fh |
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This register provides a counter of received packets with 64 bytes to the maximum allowable, and a FCS error. The counter is cleared upon being read.
BITS | DESCRIPTION | TYPE | DEFAULT |
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31:0 | RX Alignment | RC | 00000000h |
| Count of packets that have between 64 bytes and the maximum allowable |
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| number of bytes and are not byte aligned and have a bad FCS. The max |
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| number of bytes is 1518 for untagged packets and 1522 for tagged packets. |
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| If Jumbo2K (bit 3) is set in the Port x MAC Receive Configuration Register |
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| (MAC_RX_CFG_x), the max number of bytes is 2048. |
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| Note: This counter will stop at its maximum value of FFFF_FFFFh. |
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| Minimum rollover time at 100Mbps is approximately 481 hours. |
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Note: For this counter, a packet with the maximum number of bytes that is not an integral number of bytes (e.g. a 1518 1/2 byte packet) and a FCS error is considered an alignment error and is counted.
SMSC LAN9312 | 339 | Revision 1.4 |
| DATASHEET |
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