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Address | Chip in Use |
C6F | Other control registers |
CA2 - CA3 | IPMI (MPI KCS interface) |
CA4 - CA5 | IPMI (SMI interface) |
CA6 - CA7 | IPMI (SCI/SW1 interface) |
CD6 | Power management index register |
CD7 | Power management data register |
CF8, CFC | PCI configuration space |
CF9 | Reset control |
F50 - F58 | General chipset |
FE00 - FE3F | Chipset |
BAR4+00 - 0F | EDMA2 PCI base address register 4 |
*1 Hexadecimal notation
*2 The I/O port address of a PCI device is set according to its type and number.