3 . Instruction

Set

API

Mnemonic

 

 

Operands

Function

 

Controllers

 

34

SFTR

 

P

 

 

 

 

Bit Shift Right

ES2/EX2 SS2

SA2

SX2

 

 

 

 

 

SE

Type

Bit Devices

 

 

 

Word devices

 

 

 

Program Steps

 

OP

X

Y

M

S

K

H KnX KnY KnM KnS T

C D

E

F SFTR, SFTRP: 9 steps

S

*

*

*

*

 

 

 

 

 

 

 

 

 

 

 

D

 

*

*

*

 

 

 

 

 

 

 

 

 

 

 

n1

 

 

 

 

*

*

 

 

 

 

 

 

 

 

 

n2

 

 

 

 

*

*

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PULSE

 

16-bit

 

 

32-bit

 

 

 

 

 

 

ES2/EX2

SS2

SA2

SX2 ES2/EX2

SS2

SA2

SX2

ES2/EX2 SS2

SA2

SX2

 

 

 

 

 

SE

SE

SE

 

 

 

 

 

 

 

 

 

 

 

 

 

Operands:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

S: Start No. of source device D: Start No. of destination device n1: Length of data to be

shifted n2: Number of bits to be shifted as a group

Explanation:

1.This instruction performs a right shift from source device of n2 bits starting from S to destination device of n1 bits starting from D.

2.This instruction is generally used in pulse execution mode (SFTRP).

3.Valid range of operand n1, n2 : 1≤ n2 n1 ≤1024

Program Example:

1.When X0 is rising edge triggered, SFTR instruction shifts X0~X4 into 16 bit data M0~M15 and M0~M15 also shift to the right with a group of 4 bits.

2.The figure below illustrates the right shift of the bits in one scan.

n M3~M0

Carry

o M7~M4

M3~M0

p M11~M8

M7~M4

qM15~M12 M11~M8

r X3~X0

M15~M12 completed

5

X0

SFTR

X0

M0

K16

K4

4 bits in a group shift to the right

X3 X2 X1 X0

M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0 Carry

4

3

2

1

3 - 95

Page 211
Image 211
Delta DVP-ES2/EX2/SS2/SA2/SX2/SE manual KnX KnY KnM KnS T SFTR, Sftrp 9 steps