Delta DVP-ES2/EX2/SS2/SA2/SX2/SE manual Plsr, Pulse Ramp

3. Instruction Set

API

59

Mnemonic		Operands	Function
D	PLSR		Pulse Ramp

Controllers

ES2/EX2 SS2 SA2 SX2

SE

Type

Bit Devices

Word devices

Program Steps

OP

X

Y

M

S

K

H

KnX

KnY

KnM

KnS

T

C

D

E

F

PLSR: 9 steps

S1

*

*

*

*

*

*

*

*

*

*

*

DPLSR: 17 steps

S2

*

*

*

*

*

*

*

*

*

*

*

S3

*

*

*

*

*

*

*

*

*

*

*

D

*

16-bit

PULSE

32-bit

ES2/EX2

SS2

SA2

SX2

ES2/EX2

SS2

SA2

SX2

ES2/EX2

SS2

SA2

SX2

SE

SE

SE

Operands:

S1: Maximum frequency (Hz)

S2: Number of pulses S3: Ramp up/down time (ms)

D: Pulse output device (Y0, Y1, Y2 and Y3 are available) (DVP-SE does not support Y1 and Y3.)

Explanations:

52.PLSR instruction performs a frequency ramp up/down process when positioning. Speed ramp up process is activated between static status to the target speed. Pulse output persists in target speed before getting close to target position. When target position is near, speed ramp down process executes, and pulse output stops when target position is achieved.

53.Set range of S1 pulse output frequency:

Range of S1 pulse output frequency:

	Output	Y0, Y2	Y1, Y3
Output	16-bit	SS2: 6~10,000Hz	6~10,000Hz
		ES2/EX2/SA2/SX2/SE: 6~32,767Hz
frequency:
	32-bit	SS2: 6~10,000Hz	6~10,000Hz
		ES2/EX2/SA2/SX2/SE: 0~100,000Hz

If frequency smaller than 6Hz is specified, PLC will output 6Hz.

If frequency bigger than max frequency is specified, PLC will output with max frequency.

54.When output device is specified with Y0, Y2, the start/end frequency of Y0 is set by D1340 and start/end frequency of Y2 is set by D1352.

55.When output device is specified with Y1, Y3, the start/end frequency is 0Hz.

56.When D1220/D1221 = K1 or K2, positive/negative sign of S2 denotes pulse output direction.

57.PLSR instruction supports two modes of pulse output as below list.

Mode	D1220			D1221
Output	K0	K1	K0	K1
Y0	Pulse	Pulse
Y1	Pulse	Dir
Y2			Pulse	Pulse

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