3. Instruction Set
3-411
API Mnemonic Operands Function
183
MXNR P Matrix XNR
Controllers
ES2/EX2 SS2 SA2
SE SX2
Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S1 * * * * * * *
S2 * * * * * * *
D ** * * * *
n * * *
MXNR, MXNRP: 9 steps
PULSE 16-bit 32-bit
ES2/EX2 SS2 SA2
SE SX2 ES2/EX2 SS2 SA2
SE SX2 ES2/EX2 SS2 SA2
SE SX2
Operands:
S1: Matrix source device 1 S2: Matrix source device 2 D: Operation result
n: Matrix length (K1~K256)
Explanations:
1. MXNR instruction performs matrix XNR operation between matrix source device 1 and 2 with
matrix length n and stores the operation result in D.
2. Rule of matrix XNR operation: The result is 1 if the two bits are the same. The result is 0 if the
two bits are different.
3. If operands S1, S2, D use KnX, KnY, KnM, KnS format, only n = 4 is applicable.
Program Example:
When X0 = ON, MXNR performs matrix XNR operation between 16-bit registers D0~D2 and 16-bit
registers D10~D12. The operation result is then stored in 16-bit registers D20~D22.
X0 MXNR D0 D20 K3D10
Before
Execution
After
Execution
1
11 00011
0000
1100011
0000
1100011
0000
010101010101010
1010101010101010
1010101010101010
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1000
1000
1000
1
1
1
11
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
b15 b0
MXNR
D0
D1
D2
D10
D11
D12
D20
D21
D22