3. Instruction Set

API Mnemonic

Operands

Function

Controllers

156

D

ZRN

Zero return

ES2/EX2

SS2

SA2 SX2

 

 

SE

 

 

 

 

 

 

Type

 

Bit Devices

 

 

 

 

 

Word Devices

 

 

 

 

 

 

 

Program Steps

 

OP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X

Y

M

S

K

H

KnX

KnY

KnM

KnS

T

C

 

D

 

E

F

DZRN: 17 steps

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

S1

 

 

 

 

 

*

*

*

 

*

 

*

*

*

*

 

*

 

*

 

 

 

 

 

 

S2

 

 

 

 

 

*

*

*

 

*

 

*

*

*

*

 

*

 

*

 

 

 

 

 

 

S3

 

*

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D

 

 

*

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

16-bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PULSE

 

 

 

 

 

 

32-bit

 

 

 

 

 

 

 

 

 

 

 

ES2/EX2

SS2

SA2

SX2

ES2/EX2

SS2

SA2

SX2

ES2/EX2

SS2

SA2

SX2

 

 

 

 

 

 

 

 

 

SE

SE

SE

Operands:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

S1: Target frequency for zero return

S2: JOG frequency for DOG

 

 

S3: input device for DOG

D:

Pulse output device

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Explanations:

1.S1 (zero return speed): max. 100kHz. S2 (JOG speed for DOG) has to be lower than S1. JOG speed for DOG also refers to the start frequency.

2.S3 and D operands have to be used as an input/output set according to the table below, i.e. when S3 is specified as X4, D has to be specified as Y0; also when S3 is specified as X6, D has to be specified as Y2.

3.M1307 enables (ON) / disables (OFF) left limit switch of CH0 (Y0, Y1) and CH1 (Y2, Y3). M1307 has to be set up before the instruction executes. M1305 and M1306 can reverse the pulse output direction on Y1 and Y3 and have to be set up before instruction executes. Associated left limit switch for CH0 (Y0, Y1) is X5; associated left limit switch for CH1 (Y2, Y3) is X7. All functions, input points and output points are arranged as follows:

 

Channel

 

 

CH0(Y0,Y1)

 

 

CH1(Y2,Y3)

 

 

Remark

 

 

Input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DOG point

 

 

X4

 

 

 

X6

 

 

 

 

Left limit switch (M1307 = ON)

 

 

X5

 

 

 

X7

 

 

 

 

Reverse pulse output direction

 

 

M1305

 

 

 

M1306

 

 

 

 

Zero point selection

 

 

M1106

 

 

 

M1107

 

Please refer to point

 

 

 

 

 

 

 

7 for the explanation.

 

 

 

 

 

 

 

 

 

 

 

 

M1346=On

 

 

Y4

 

 

 

Y5

 

Please refer to point

 

Start output clear signals

 

 

 

 

 

 

8 for the explanation.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M1308

= Off

 

 

 

Please refer to point

 

D1312 != 0

 

 

(seeking Z-phase signal)

 

 

 

 

 

 

 

 

 

 

 

 

9 for the explanation.

 

 

 

 

X2

 

 

 

X3

 

 

 

 

 

 

 

 

 

 

 

 

D1312 != 0

 

 

M1308

= On

 

 

 

Please refer to

 

 

 

(outputting the designated number of

 

point 10 for the

 

 

 

 

 

pulses)

 

 

 

explanation.

3 - 3 6 3

Page 479
Image 479
Delta DVP-ES2/EX2/SS2/SA2/SX2/SE manual API Mnemonic Operands Function Controllers, Zrn