8 ELECTRICAL CHARACTERISTICS
SRAM read cycle (basic cycle: 1 cycle)
tC3 |
|
|
BCLK |
|
|
tAD |
| tAD |
A[23:0] |
|
|
tCE1 |
| tCE2 |
#CEx |
|
|
| tRDD1 | tRDD2 |
| tRDW |
|
#RD |
|
|
tCEAC1 |
|
|
tACC1 | tRDAC1 |
|
|
| |
D[15:0] |
|
|
| tRDS | ∗ 1 |
| tRDH | |
tWTS | tWTH |
|
#WAIT
*1 tRDH is measured with respect to the first signal change (negation) from among the #RD, #CEx and A[23:0] signals.
SRAM read cycle (when a wait cycle is inserted)
C1 | Cw(wait cycle) | Cn(last cycle) |
BCLK |
|
|
tAD |
| tAD |
A[23:0] |
|
|
tCE1 |
| tCE2 |
#CEx |
|
|
| tRDD1 (C1 only) | tRDD2 |
|
| tRDW |
#RD
tCEAC1
tACC1
tRDAC1
D[15:0]
tWTS |
|
| tWTH |
| tWTS |
|
| tWTH |
| tWTS |
|
| tWTH |
|
|
|
|
|
|
|
|
| ||||||
| tRDS |
|
| tRDH | ∗ 1 | |||||||||||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |||||
#WAIT
*1 tRDH is measured with respect to the first signal change (negation) from among the #RD, #CEx and A[23:0] signals.
EPSON | S1C33L03 PRODUCT PART |