V DMA BLOCK: IDMA (Intelligent DMA)

Processing of interrupt factors by type of trigger

•When invoked by an interrupt factor

The interrupt factor flag by which IDMA has been invoked remains set even during a DMA transfer.

If the transfer counter is decremented to 0 and DINTEN = "1" (interrupt enabled) when one DMA transfer is completed, the interrupt factor that has invoked IDMA is not reset and an interrupt request is generated. At the same time, the IDMA request register is cleared to "0". The IDMA enable bit is not cleared and remains set to "1".

If the transfer counter is not 0, the interrupt factor flag is reset when the DMA transfer is completed, so that no interrupt is generated. In this case, the IDMA request bit and IDMA enable bit are not cleared and remain set to "1".

When DINTEN has been set to "0" (interrupt disabled), the interrupt factor flag is reset even if the transfer counter reaches 0, so that no interrupt is generated. In this case, the IDMA request bit is not cleared but the IDMA enable bit is cleared.

Trigger by interrupt factor

Data transfer

Transfer counter

2

 

1

0

 

 

 

1

0

DINTEN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IDMA request bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IDMA enable bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Interrupt factor flag

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Interrupt request

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 3.4

Operation when Invoked by Interrupt Factor

 

 

When IDMA is invoked by the software trigger, the IDMA interrupt factor flag FIDMA (D4)/DMA interrupt factor flag register (0x40281) will not be set.

•When invoked by a software trigger

If the transfer counter is decremented to 0 and DINTEN = "1" (interrupt enabled) when one DMA transfer is completed, the IDMA interrupt factor flag FIDMA (D4)/DMA interrupt factor flag register (0x40281) is set, thereby generating an interrupt request.

If the transfer counter is not 0 or DINTEN = "0" (interrupt disabled), the FIDMA flag is not set.

If the interrupt factor flag for the same channel is set during a software-triggered transfer, the IDMA invocation request by that interrupt factor flag is kept pending. However, the interrupt factor flag will be reset when the current execution is completed, so there will be no DMA transfer by the interrupt factor flag.

Software trigger

Data transfer

Transfer counter

2

1

0

1

0

DINTEN

FIDMA (D4/0x40281)

Interrupt request

Figure 3.5 Operation when Invoked by Software Trigger

A-1

B-V

IDMA

S1C33L03 FUNCTION PART

EPSON

B-V-3-11