V DMA BLOCK: HSDMA
I/O Memory of HSDMA
Table 2.5 shows the control bits of HSDMA.
Table 2.5 Control Bits of HSDMA
Register name | Address | Bit | Name | Function |
| Setting |
| Init. | R/W | Remarks | ||
|
|
|
|
|
|
|
|
|
|
|
|
|
0040263 | D7 | – | reserved |
|
| – |
| – | – | 0 when being read. | ||
DMA Ch.0/1 | (B) | D6 | PHSD1L2 |
|
| 0 to 7 |
| X | R/W |
| ||
interrupt |
| D5 | PHSD1L1 | interrupt level |
|
|
|
|
| X |
|
|
priority register |
| D4 | PHSD1L0 |
|
|
|
|
|
| X |
|
|
|
| D3 | – | reserved |
|
| – |
| – | – | 0 when being read. | |
|
| D2 | PHSD0L2 |
|
| 0 to 7 |
| X | R/W |
| ||
|
| D1 | PHSD0L1 | interrupt level |
|
|
|
|
| X |
|
|
|
| D0 | PHSD0L0 |
|
|
|
|
|
| X |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
0040264 | D7 | – | reserved |
|
| – |
| – | – | 0 when being read. | ||
DMA Ch.2/3 | (B) | D6 | PHSD3L2 |
|
| 0 to 7 |
| X | R/W |
| ||
interrupt |
| D5 | PHSD3L1 | interrupt level |
|
|
|
|
| X |
|
|
priority register |
| D4 | PHSD3L0 |
|
|
|
|
|
| X |
|
|
|
| D3 | – | reserved |
|
| – |
| – | – | 0 when being read. | |
|
| D2 | PHSD2L2 |
|
| 0 to 7 |
| X | R/W |
| ||
|
| D1 | PHSD2L1 | interrupt level |
|
|
|
|
| X |
|
|
|
| D0 | PHSD2L0 |
|
|
|
|
|
| X |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
DMA interrupt | 0040271 | – | reserved |
|
| – |
| – | – | 0 when being read. | ||
enable register | (B) | D4 | EIDMA | IDMA | 1 | Enabled |
| 0 | Disabled | 0 | R/W |
|
|
| D3 | EHDM3 |
|
|
|
|
| 0 | R/W |
| |
|
| D2 | EHDM2 |
|
|
|
|
| 0 | R/W |
| |
|
| D1 | EHDM1 |
|
|
|
|
| 0 | R/W |
| |
|
| D0 | EHDM0 |
|
|
|
|
| 0 | R/W |
| |
|
|
|
|
|
|
|
|
|
|
| ||
DMA interrupt | 0040281 | – | reserved |
|
| – |
| – | – | 0 when being read. | ||
factor flag | (B) | D4 | FIDMA | IDMA | 1 | Factor is |
| 0 | No factor is | X | R/W |
|
register |
| D3 | FHDM3 |
| generated |
| generated | X | R/W |
| ||
|
| D2 | FHDM2 |
|
|
|
|
| X | R/W |
| |
|
| D1 | FHDM1 |
|
|
|
|
| X | R/W |
| |
|
| D0 | FHDM0 |
|
|
|
|
| X | R/W |
| |
|
|
|
|
|
|
|
|
|
|
|
| |
Port input | 0040290 | D7 | R16TC0 | 1 | IDMA |
| 0 | Interrupt | 0 | R/W |
| |
(B) | D6 | R16TU0 |
| request |
|
| request | 0 | R/W |
| ||
DMA Ch. 0/1, |
| D5 | RHDM1 |
|
|
|
|
| 0 | R/W |
| |
| D4 | RHDM0 |
|
|
|
|
| 0 | R/W |
| ||
IDMA request |
| D3 | RP3 | Port input 3 |
|
|
|
|
| 0 | R/W |
|
register |
| D2 | RP2 | Port input 2 |
|
|
|
|
| 0 | R/W |
|
|
| D1 | RP1 | Port input 1 |
|
|
|
|
| 0 | R/W |
|
|
| D0 | RP0 | Port input 0 |
|
|
|
|
| 0 | R/W |
|
|
|
|
|
|
|
|
|
|
|
|
| |
Port input | 0040294 | D7 | DE16TC0 | 1 | IDMA |
| 0 | IDMA | 0 | R/W |
| |
(B) | D6 | DE16TU0 |
| enabled |
|
| disabled | 0 | R/W |
| ||
DMA Ch. 0/1, |
| D5 | DEHDM1 |
|
|
|
|
| 0 | R/W |
| |
| D4 | DEHDM0 |
|
|
|
|
| 0 | R/W |
| ||
IDMA enable |
| D3 | DEP3 | Port input 3 |
|
|
|
|
| 0 | R/W |
|
register |
| D2 | DEP2 | Port input 2 |
|
|
|
|
| 0 | R/W |
|
|
| D1 | DEP1 | Port input 1 |
|
|
|
|
| 0 | R/W |
|
|
| D0 | DEP0 | Port input 0 |
|
|
|
|
| 0 | R/W |
|
HSDMA
S1C33L03 FUNCTION PART | EPSON |