1 OUTLINE |
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Interrupt controller: | Possible to invoke DMA |
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| Input interrupt | 10 types (programmable) | |
| DMA controller interrupt | 5 types | |
| 12 types | ||
| 4 types | ||
| Serial interface interrupt | 6 types | |
| A/D converter interrupt | 1 type | |
| Clock timer interrupt | 1 type | |
Shared with the I/O pins for internal peripheral circuits | |||
and output ports: | Input port | 13 bits |
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| I/O port | 29 bits |
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External bus interface
BCU (bus control unit)
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Data size is selectable from 8 bits and 16 bits in each area.
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•Memory mapped I/O
•Chip enable and wait control circuits
•DRAM direct interface function
•Supports SDRAM.
Supports SDRAM
•Supports burst ROM.
Operating conditions and power consumption
Operating voltage: | Core (VDD) | 1.8 V to 3.6 V |
| I/O (VDDE) | 1.8 V to 5.5 V |
Operating clock frequency: CPU operating clock frequency | ||
| 50 MHz max. (core voltage = 3.3 V ±0.3 V) | |
| LCD controller operating clock frequency | |
| 25 MHz max. (core voltage = 3.3 V ±0.3 V) | |
| * When the SDRAM controller is used | |
| (core voltage = 3.3 V ±0.3 V and PLL is used), | |
| In x1 speed mode: CPU = Bus = 25 MHz max. | |
| In x2 speed mode: CPU = 35 MHz max., Bus = 17.5 MHz max. | |
Operating temperature: |
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Power consumption: | During SLEEP | 3.5 µW typ. (3.3 V) |
| During HALT | 100 mW typ. (3.3 V, 50 MHz) |
| During execution | 200 mW typ. (3.3 V, 50 MHz) |
Note: The values of power consumption during execution were measured when a test program that consisted of 55% load instructions, 23% arithmetic operation instructions, 1% mac instruction, 12% branch instructions and 9% ext instruction was being continuously executed.
Supply form
EPSON | S1C33L03 PRODUCT PART |