Epson S1C33L03 manual 137

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGS

A-1

A.3 ROM and Burst ROM

Burst ROM and mask ROM interface setup examples

Operating	Normal read cycle		Burst read cycle		Output disable
frequency	Wait cycle	Read cycle	Wait cycle	Read cycle	delay cycle
20MHz	2	3	1	2	1.5
25MHz	3	4	1	2	1.5
33MHz	4	5	2	3	1.5

Burst ROM and mask ROM interface timing

Burst ROM and mask ROM interface				33MHz		25MHz		20MHz
Parameter	Symbol	Min.	Max.	Cycle	Time	Cycle	Time	Cycle	Time	A-ap
Access time	tACC	–	100	5	150	4	160	3	150
#CE output delay time	tCE	–	100	5	150	4	160	3	150
#OE output delay time	tOE	–	50	4.5	135	3.5	140	2.5	125
Burst access time	tBAC	–	50	3	90	2	80	2	100
Output disable delay time	tDF	0	40	1.5	45	1.5	60	1.5	75

ROM: 100ns, CPU: 33MHz, normal read

BCLK

tACC

A[23:0]

tCE

#CE9, 10

tOE

#RD

tDF

D[15:0] RD data

ROM: 100ns, CPU: 33MHz, burst read

BCLK

Normal read cycle		Burst read cycle
	tBAC	tBAC	tBAC

A[23:0] #CE9, 10 #RD

tDF

RD data RD data RD data RD data

D[15:0]

S1C33L03 PRODUCT PART EPSON A-121