Epson S1C33L03 manual 211

II CORE BLOCK: BCU (Bus Control Unit)

Register name	Address	Bit	Name	Function				Setting				Init.	R/W	Remarks
Areas 12–11	0048124	DF–7	–	reserved					–			–	–	0 when being read.
set-up register	(HW)	D6	A12SZ	Areas 12–11 device size selection	1	8 bits				0	16 bits	0	R/W
		D5	A12DF1	Areas 12–11	A18DF[1:0]				Number of cycles			1	R/W
		D4	A12DF0	output disable delay time	1			1			3.5	1
					1			0			2.5
					0			1			1.5
					0			0			0.5
		D3	–	reserved					–			–	–	0 when being read.
		D2	A12WT2	Areas 12–11 wait control	A18WT[2:0]					Wait cycles		1	R/W
		D1	A12WT1		1		1	1			7	1
		D0	A12WT0		1		1	0			6	1
					1		0	1			5
					1		0	0			4
					0		1	1			3
					0		1	0			2
					0		0	1			1
					0		0	0			0
Areas 10–9	0048126	DF	–	reserved					–			–	–	0 when being read.
set-up register	(HW)	DE	A10IR2	Area 10 internal ROM size	A10IR[2:0]					ROM size		1	R/W
		DD	A10IR1	selection	1		1	1			2MB	1
		DC	A10IR0		1		1	0			1MB	1
					1		0	1			512KB
					1		0	0			256KB
					0		1	1			128KB
					0		1	0			64KB
					0		0	1			32KB
					0		0	0			16KB
		DB	–	reserved					–			–	–	0 when being read.
		DA	A10BW1	Areas 10–9	A10BW[1:0]					Wait cycles		0	R/W
		D9	A10BW0	burst ROM	1			1			3	0
				burst read cycle wait control	1			0			2
					0			1			1
					0			0			0
		D8	A10DRA	Area 10 burst ROM selection	1	Used				0	Not used	0	R/W
		D7	A9DRA	Area 9 burst ROM selection	1	Used				0	Not used	0	R/W
		D6	A10SZ	Areas 10–9 device size selection	1	8 bits				0	16 bits	0	R/W
		D5	A10DF1	Areas 10–9	A10DF[1:0]				Number of cycles			1	R/W
		D4	A10DF0	output disable delay time	1			1			3.5	1
					1			0			2.5
					0			1			1.5
					0			0			0.5
		D3	–	reserved					–			–	–	0 when being read.
		D2	A10WT2	Areas 10–9 wait control	A10WT[2:0]					Wait cycles		1	R/W
		D1	A10WT1		1		1	1			7	1
		D0	A10WT0		1		1	0			6	1
					1		0	1			5
					1		0	0			4
					0		1	1			3
					0		1	0			2
					0		0	1			1
					0		0	0			0
Areas 8–7	0048128	DF–9	–	reserved					–			–	–	0 when being read.
set-up register	(HW)	D8	A8DRA	Area 8 DRAM selection	1	Used				0	Not used	0	R/W
		D7	A7DRA	Area 7 DRAM selection	1	Used				0	Not used	0	R/W
		D6	A8SZ	Areas 8–7 device size selection	1	8 bits				0	16 bits	0	R/W
		D5	A8DF1	Areas 8–7	A8DF[1:0]				Number of cycles			1	R/W
		D4	A8DF0	output disable delay time	1			1			3.5	1
					1			0			2.5
					0			1			1.5
					0			0			0.5
		D3	–	reserved					–			–	–	0 when being read.
		D2	A8WT2	Areas 8–7 wait control	A8WT[2:0]					Wait cycles		1	R/W
		D1	A8WT1		1		1	1			7	1
		D0	A8WT0		1		1	0			6	1
					1		0	1			5
					1		0	0			4
					0		1	1			3
					0		1	0			2
					0		0	1			1
					0		0	0			0

A-1

B-II

BCU

S1C33L03 FUNCTION PART EPSON B-II-4-35