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Epson S1C33L03 IIIPERIPHERAL BLOCK

1 631

Download 631 pages, 3.47 Mb

S1C33L03 FUNCTION PART

IIIPERIPHERAL BLOCK

Contents

Page Page S1C33L03 Technical Manual Page Page Page Page Page Page Page Page Page Page Page Page Page 1 Outline Page Page Page Page Page Page Page Page Page Page 2 Power Supply Page 3 Internal Memory Page 4 Peripheral Circuits Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page 5 Power-DownControl Page Page 6 Basic External Wiring Diagram 7 Precautions on Mounting Page 8 Electrical Characteristics Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page 9 Package 10 Pad Layout Page Page Appendix A Page Page Page Page Page Page Page Page Page Page Page Page Page Page Appendix B Pin Characteristics Page Page Page Page IOUTLINE Page I-1INTRODUCTION Page I-2BLOCK DIAGRAM Page I-3LIST OF PINS Page Page Page Page Page Page Page IICORE BLOCK Page II-1INTRODUCTION Page II-2CPU AND OPERATING MODE Page Page Page Page Page II-3INITIAL RESET Page Page Page II-4BCU (Bus Control Unit) Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page II-5ITC (Interrupt Controller) Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page II-6CLG (Clock Generator) Page Page Page Page Page Page Page Page Page II-7DBG (Debug Unit) Page IIIPERIPHERAL BLOCK Page III-1INTRODUCTION Page III-2PRESCALER Page Page Page Page Page Page Page III-3 8-BITPROGRAMMABLE TIMERS Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page III-4 16-BITPROGRAMMABLE TIMERS Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page III-5WATCHDOG TIMER Page Page Page Page Page Page Page Page Page Page Page III-7CLOCK TIMER Page Page Page Page Page Page Page Page Page Page Page III-8SERIAL INTERFACE Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page III-9INPUT/OUTPUT PORTS Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page IV ANALOG BLOCK Page IV-1INTRODUCTION Page IV-2A/D CONVERTER Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page VDMA BLOCK Page V-1INTRODUCTION Page V-2HSDMA (High-SpeedDMA) Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page V-3IDMA (Intelligent DMA) Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page VI SDRAM CONTROLLER BLOCK Page VI-1INTRODUCTION Page VI-2SDRAM INTERFACE Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page VII LCD CONTROLLER BLOCK Page VII-1INTRODUCTION Page VII-2LCD CONTROLLER Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page I/O MAP