8 ELECTRICAL CHARACTERISTICS

8-bit single color panel timing (Format 1)

 

A-1

 

 

 

 

 

 

 

 

VDP

 

VNDP

FPFRAME

 

 

 

 

 

 

 

 

FPLINE

 

 

 

 

 

 

 

 

FPDAT[7:0]

 

Line 1

Line 2

Line 3

Line 4

Line 479 Line 480

Line 1 Line 2

 

 

 

 

 

 

 

 

A-8

FPLINE

 

 

 

 

 

 

 

 

FPSHIFT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HDP

 

HNDP

FPSHIFT2

 

 

 

 

 

 

 

 

FPDAT7

1-R1

1-G1

1-G6

1-B6

1-B11 1-R12

 

1-R636

FPDAT6

1-B1

1-R2

1-R7

1-G7

1-G12 1-B12

 

1-B636

FPDAT5

1-G2

1-B2

1-B7

1-R8

1-R13 1-G13

 

1-G637

FPDAT4

1-R3

1-G3

1-G8

1-B8

1-B13 1-R14

 

1-R638

FPDAT3

1-B3

1-R4

1-R9

1-G9

1-G14 1-B14

 

1-B638

FPDAT2

1-G4

1-B4

1-B9 1-R10

1-R15 1-G15

 

1-G639

FPDAT1

1-R5

1-G5

1-G10 1-B10

1-B15 1-R16

 

1-R640

FPDAT0

1-B5

1-R6

1-R11 1-G11

1-G16

1-B16

 

1-B640

∗Diagram drawn with 2 FPLINE vertical blank period Example timing for a 640 ⋅ 480 panel

VDP

= Vertical Display Period

= LDVSIZE[9:0] + 1 (lines)

 

 

LDVSIZE[9:0] (0x39FFE5, D[1:0]/0x39FFE6)

VNDP

= Vertical Non-Display Period

= VNDP[5:0] (lines)

 

 

VNDP[5:0] (D[5:0]/0x39FFEA)

HDP

= Horizontal Display Period

= (LDHSIZE[5:0] + 1) ⋅ 16 (Ts)

 

 

LDHSIZE[5:0] (D[5:0]/0x39FFE4)

HNDP

= Horizontal Non-Display Period

= (HNDP[4:0] + 4) ⋅ 8 (Ts)

 

 

HNDP[4:0] (D[4:0]/0x39FFE7)

S1C33L03 PRODUCT PART

EPSON

A-103