II CORE BLOCK: INITIAL RESET
Be sure to reset (cold start) the chip after turning on the power to start operating.
Since the #RESET pin is directly connected to an input gate, a
An initial reset (#RESET = low) turns the
Figure 3.2 shows a
VDD |
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| 3.0 V (VDD = 3.3 V) | ||||
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| tSTA3 (OSC3 oscillation start time) or more | |
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#RESET |
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| 0.5VDD | ||
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| Power on |
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| 0.1VDD | |||||
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| Figure 3.2 |
Maintain the #RESET pin at 0.1•VDD or less (low level) after turning the power on until the supply voltage rises at least to the oscillation start voltage (3.0 V). Furthermore, maintain the #RESET pin at 0.5•VDD or less until the
Note: The OSC3 oscillation start time varies due to the elements used, board pattern and operating environment, therefore allow enough margin for the
Reset Pulse
A low pulse can be input to the #RESET pin for resetting the chip being operated.
The minimum reset pulse width is provided in "AC Characteristics". Be sure to input a pulse that has a pulse width longer than the minimum value.
To reset the chip when the
EPSON | S1C33L03 FUNCTION PART |