III PERIPHERAL BLOCK: INPUT/OUTPUT PORTS
I/O Memory of Input Ports
Table 9.2 shows the control bits of the input ports.
Table 9.2 Control Bits of Input Ports
| Register name | Address | Bit | Name | Function |
| Setting |
| Init. | R/W | Remarks |
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| K5 function | 00402C0 | – | reserved |
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| – | – | 0 when being read. |
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| select register | (B) | D4 | CFK54 | K54 function selection | 1 | #DMAREQ3 |
| 0 | K54 | 0 | R/W |
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| D3 | CFK53 | K53 function selection | 1 | #DMAREQ2 |
| 0 | K53 | 0 | R/W |
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| D2 | CFK52 | K52 function selection | 1 | #ADTRG |
| 0 | K52 | 0 | R/W |
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| D1 | CFK51 | K51 function selection | 1 | #DMAREQ1 |
| 0 | K51 | 0 | R/W |
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| D0 | CFK50 | K50 function selection | 1 | #DMAREQ0 |
| 0 | K50 | 0 | R/W |
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| K5 input port | 00402C1 | – | reserved |
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| – | – | 0 when being read. |
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| data register | (B) | D4 | K54D | K54 input port data | 1 | High |
| 0 | Low | – | R |
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| D3 | K53D | K53 input port data |
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| – | R |
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| D2 | K52D | K52 input port data |
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| – | R |
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| D1 | K51D | K51 input port data |
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| – | R |
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| D0 | K50D | K50 input port data |
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| – | R |
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| K6 function | 00402C3 | D7 | CFK67 | K67 function selection | 1 | AD7 |
| 0 | K67 | 0 | R/W |
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| select register | (B) | D6 | CFK66 | K66 function selection | 1 | AD6 |
| 0 | K66 | 0 | R/W |
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| D5 | CFK65 | K65 function selection | 1 | AD5 |
| 0 | K65 | 0 | R/W |
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| D4 | CFK64 | K64 function selection | 1 | AD4 |
| 0 | K64 | 0 | R/W |
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| D3 | CFK63 | K63 function selection | 1 | AD3 |
| 0 | K63 | 0 | R/W |
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| D2 | CFK62 | K62 function selection | 1 | AD2 |
| 0 | K62 | 0 | R/W |
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| D1 | CFK61 | K61 function selection | 1 | AD1 |
| 0 | K61 | 0 | R/W |
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| D0 | CFK60 | K60 function selection | 1 | AD0 |
| 0 | K60 | 0 | R/W |
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| K6 input port | 00402C4 | D7 | K67D | K67 input port data | 1 | High |
| 0 | Low | – | R |
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| data register | (B) | D6 | K66D | K66 input port data |
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| – | R |
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| D5 | K65D | K65 input port data |
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| – | R |
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| D4 | K64D | K64 input port data |
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| – | R |
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| D3 | K63D | K63 input port data |
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| – | R |
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| D2 | K62D | K62 input port data |
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| – | R |
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| D1 | K61D | K61 input port data |
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| – | R |
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| D0 | K60D | K60 input port data |
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| – | R |
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Selects the function of each
Write "1": | Used for peripheral circuit |
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Write "0": | Input port pin |
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Read: | Invalid |
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When a bit of the CFK register is set to "1", the corresponding pin is set for use with the peripheral circuit (see |
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Table 9.1). The pins for which register bits are set to "0" can be used as |
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At cold start, CFK is set to "0" (input port). At hot start, CFK retains its state from prior to the initial reset. |
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| I/O |
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The input data on each input port pin can be read from this register. |
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Read "1": High level |
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Read "0": Low level |
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Write: | Invalid |
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The pin voltage of each input port can be read out "1" directly when the voltage is high (VDD) or "0" when the voltage is low (VSS) respectively.
Since this register is a
When the ports set for A/D converter input are read, the value obtained is always "0".
S1C33L03 FUNCTION PART | EPSON |