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| 8 ELECTRICAL CHARACTERISTICS | |
Burst ROM read cycle |
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SRAM read cycle | Burst cycle | Burst cycle | Burst cycle |
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BCLK |
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tAD |
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| tAD |
A[23:2] |
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tAD | tAD | tAD | tAD | tAD |
A[1:0] |
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tCE1 |
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| tCE2 |
#CEx |
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tRDD1 |
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| tRDD2 |
#RD |
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tACC2 | tACCB | tACCB | tACCB |
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tCEAC |
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tRDAC2 |
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tRDS | tRDS | tRDS | tRDS |
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D[15:0] |
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| ∗ 1 |
| tRDH | tRDH | tRDH | |
| tRDH |
∗1 tRDH is measured with respect to the first signal change (negation) from among the #RD, #CEx and A[23:0] signals.
#BUSREQ, #BUSACK and #NMI timing
BCLK
tBRQS tBRQH
#BUSREQ
Valid input
tBAKD
#BUSACK
tZ2E
eBUS_OUT signals ∗ 1
tB2Z
eBUS_OUT signals ∗ 1
tNMIW
#NMI
∗1 eBUS_OUT indicates the following pins:
A[23:0], #RD, #WRL, #WRH, #HCAS, #LCAS, #CE[17:4], D[15:0]
Input, output and I/O port timing
BCLK
tINPS tINPH
Kxx, Pxx
(input: data readValid input from the port)
Pxx, Rxx (output)
tKINW
Kxx
tOUTD
S1C33L03 PRODUCT PART | EPSON |