8 ELECTRICAL CHARACTERISTICS

Burst ROM read cycle

 

 

 

A-1

 

 

 

 

SRAM read cycle

Burst cycle

Burst cycle

Burst cycle

 

BCLK

 

 

 

 

tAD

 

 

 

tAD

A[23:2]

 

 

 

 

tAD

tAD

tAD

tAD

tAD

A[1:0]

 

 

 

A-8

tCE1

 

 

 

tCE2

#CEx

 

 

 

 

tRDD1

 

 

 

tRDD2

#RD

 

 

 

 

tACC2

tACCB

tACCB

tACCB

 

tCEAC

 

 

 

 

tRDAC2

 

 

 

 

tRDS

tRDS

tRDS

tRDS

 

D[15:0]

 

 

 

1

 

tRDH

tRDH

tRDH

 

tRDH

1 tRDH is measured with respect to the first signal change (negation) from among the #RD, #CEx and A[23:0] signals.

#BUSREQ, #BUSACK and #NMI timing

BCLK

tBRQS tBRQH

#BUSREQ

Valid input

tBAKD

#BUSACK

tZ2E

eBUS_OUT signals 1

tB2Z

eBUS_OUT signals 1

tNMIW

#NMI

1 eBUS_OUT indicates the following pins:

A[23:0], #RD, #WRL, #WRH, #HCAS, #LCAS, #CE[17:4], D[15:0]

Input, output and I/O port timing

BCLK

tINPS tINPH

Kxx, Pxx

(input: data readValid input from the port)

Pxx, Rxx (output)

tKINW

Kxx

(K-port interrupt input)

tOUTD

S1C33L03 PRODUCT PART

EPSON

A-95