III PERIPHERAL BLOCK: CLOCK TIMER

III-7 CLOCK TIMER

Configuration of Clock Timer

The clock timer consists of an 8-bit binary counter that is clocked by a 256-Hz signal derived from the low-speed (OSC1) oscillation clock fOSC1, and second, minute, hour, and day counters, allowing all data (128 Hz to 1 Hz, seconds, minutes, hours, and day) to be read out in a software. It can also generate an interrupt using a 32-Hz, 8-Hz, 2-Hz, or 1-Hz (1-second) signal or when a one-minute, one-hour, or one-day count is up, in addition to generating an alarm at a specified time (minute or hour) or day.

The low-speed (OSC1) oscillation circuit and the clock timer can be kept operating even when the CPU and other internal peripheral circuits are placed in standby mode (HALT or SLEEP).

Normally, this clock timer should be used for a clock and various other clocking functions. Figure 7.1 shows the structure of the clock timer.

Note: Since the clock timer is driven by a clock originating from the low-speed (OSC1) oscillation circuit, this timer cannot be used unless the low-speed (OSC1) oscillation circuit (32.768 kHz, Typ.) is used.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Internal data bus

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OSC1

 

fOSC1

 

 

256 Hz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6-bit

 

 

 

6-bit

 

 

 

5-bit

 

 

 

16-bit

oscillation

 

Divider

 

 

128

64

32

16

8

4

2

1

 

 

 

seconds

 

 

minutes

 

 

 

hours

 

 

 

day

 

 

 

 

 

 

Hz

Hz

Hz

Hz

Hz

Hz

Hz

Hz

 

 

 

 

 

 

 

 

 

 

 

circuit

 

 

 

 

 

 

 

 

 

 

 

counter

 

 

counter

 

 

counter

 

 

counter

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32.768 kHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clock timer Run/Stop

Clock timer reset

Interrupt generation

control circuit

Interrupt request

 

Interrupt/alarm

 

 

 

 

 

 

 

 

 

 

 

Comparator

Comparator

Comparator

 

select circuit

 

 

(to interrupt controller)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Alarm generation

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

control circuit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6-bit minute

5-bit hour

5-bit day

 

 

 

 

 

 

comparison

comparison

comparison

 

 

 

 

 

 

 

data

 

data

 

data

Figure 7.1 Structure of Clock Timer

A-1

B-III

CTM

S1C33L03 FUNCTION PART

EPSON

B-III-7-1