IV ANALOG BLOCK: A/D CONVERTER
Register name | Address | Bit | Name | Function |
| Setting |
| Init. | R/W | Remarks | ||
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Serial I/F Ch.1, | 004026A | D7 | – | reserved |
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| – |
| – | – | 0 when being read. | |
A/D interrupt | (B) | D6 | PAD2 | A/D converter interrupt level |
| 0 to 7 |
| X | R/W |
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priority register |
| D5 | PAD1 |
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| X |
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| D4 | PAD0 |
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| X |
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| D3 | – | reserved |
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| – |
| – | – | 0 when being read. | |
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| D2 | PSIO12 | Serial interface Ch.1 |
| 0 to 7 |
| X | R/W |
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| D1 | PSIO11 | interrupt level |
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| X |
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| D0 | PSIO10 |
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| X |
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Port input | 0040277 | – | reserved |
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| – |
| – | – | 0 when being read. | ||
clock timer, | (B) | D5 | EP7 | Port input 7 | 1 | Enabled |
| 0 | Disabled | 0 | R/W |
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A/D interrupt |
| D4 | EP6 | Port input 6 |
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| 0 | R/W |
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enable register |
| D3 | EP5 | Port input 5 |
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| 0 | R/W |
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| D2 | EP4 | Port input 4 |
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| 0 | R/W |
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| D1 | ECTM | Clock timer |
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| 0 | R/W |
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| D0 | EADE | A/D converter |
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| 0 | R/W |
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Port input | 0040287 | – | reserved |
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| – |
| – | – | 0 when being read. | ||
clock timer, A/D | (B) | D5 | FP7 | Port input 7 | 1 | Factor is |
| 0 | No factor is | X | R/W |
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interrupt factor |
| D4 | FP6 | Port input 6 |
| generated |
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| generated | X | R/W |
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flag register |
| D3 | FP5 | Port input 5 |
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| X | R/W |
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| D2 | FP4 | Port input 4 |
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| X | R/W |
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| D1 | FCTM | Clock timer |
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| X | R/W |
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| D0 | FADE | A/D converter |
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| X | R/W |
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Serial I/F Ch.1, | 0040293 | D7 | RP7 | Port input 7 | 1 | IDMA |
| 0 | Interrupt | 0 | R/W |
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A/D, | (B) | D6 | RP6 | Port input 6 |
| request |
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| request | 0 | R/W |
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port input |
| D5 | RP5 | Port input 5 |
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| 0 | R/W |
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IDMA request |
| D4 | RP4 | Port input 4 |
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| 0 | R/W |
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register |
| D3 | – | reserved |
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| – |
| – | – | 0 when being read. | |
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| D2 | RADE | A/D converter | 1 | IDMA |
| 0 | Interrupt | 0 | R/W |
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| D1 | RSTX1 | SIF Ch.1 transmit buffer empty |
| request |
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| request | 0 | R/W |
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| D0 | RSRX1 | SIF Ch.1 receive buffer full |
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| 0 | R/W |
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Serial I/F Ch.1, | 0040297 | D7 | DEP7 | Port input 7 | 1 | IDMA |
| 0 | IDMA | 0 | R/W |
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A/D, | (B) | D6 | DEP6 | Port input 6 |
| enabled |
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| disabled | 0 | R/W |
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port input |
| D5 | DEP5 | Port input 5 |
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| 0 | R/W |
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IDMA enable |
| D4 | DEP4 | Port input 4 |
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| 0 | R/W |
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register |
| D3 | – | reserved |
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| – |
| – | – | 0 when being read. | |
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| D2 | DEADE | A/D converter | 1 | IDMA |
| 0 | IDMA | 0 | R/W |
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| D1 | DESTX1 | SIF Ch.1 transmit buffer empty |
| enabled |
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| disabled | 0 | R/W |
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| D0 | DESRX1 | SIF Ch.1 receive buffer full |
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| 0 | R/W |
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K5 function | 00402C0 | – | reserved |
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| – |
| – | – | 0 when being read. | ||
select register | (B) | D4 | CFK54 | K54 function selection | 1 | #DMAREQ3 |
| 0 | K54 | 0 | R/W |
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| D3 | CFK53 | K53 function selection | 1 | #DMAREQ2 |
| 0 | K53 | 0 | R/W |
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| D2 | CFK52 | K52 function selection | 1 | #ADTRG |
| 0 | K52 | 0 | R/W |
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| D1 | CFK51 | K51 function selection | 1 | #DMAREQ1 |
| 0 | K51 | 0 | R/W |
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| D0 | CFK50 | K50 function selection | 1 | #DMAREQ0 |
| 0 | K50 | 0 | R/W |
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K6 function | 00402C3 | D7 | CFK67 | K67 function selection | 1 | AD7 |
| 0 | K67 | 0 | R/W |
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select register | (B) | D6 | CFK66 | K66 function selection | 1 | AD6 |
| 0 | K66 | 0 | R/W |
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| D5 | CFK65 | K65 function selection | 1 | AD5 |
| 0 | K65 | 0 | R/W |
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| D4 | CFK64 | K64 function selection | 1 | AD4 |
| 0 | K64 | 0 | R/W |
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| D3 | CFK63 | K63 function selection | 1 | AD3 |
| 0 | K63 | 0 | R/W |
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| D2 | CFK62 | K62 function selection | 1 | AD2 |
| 0 | K62 | 0 | R/W |
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| D1 | CFK61 | K61 function selection | 1 | AD1 |
| 0 | K61 | 0 | R/W |
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| D0 | CFK60 | K60 function selection | 1 | AD0 |
| 0 | K60 | 0 | R/W |
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CFK52: K52 pin function selection (D2) / K5 function select register (0x402C0)
Selects the pins used by the A/D converter.
Write "1": A/D converter
Write "0": Input port
Read: Valid
When an external trigger is used, write "1" to CFK52 to set the K52 pin for external trigger input #ADTRG. Select the pin used for analog input from among K60 (AD0) through K67 (AD7) by writing "1" to CFK60 through CFK67.
If the function select bit for a pin is set to "0", the pin is set for an input port.
At cold start, CFK is set to "0" (input port). At hot start, CFK retains its state from prior to the initial reset.
EPSON | S1C33L03 FUNCTION PART |