8 ELECTRICAL CHARACTERISTICS

8.3 DC Characteristics

1) 3.3 V/5.0 V dual power source

(Unless otherwise specified: VDDE=5V±0.5V, VDD=2.7V to 3.6V, VSS=0V, Ta=-40°C to +85°C)

Item

Symbol

Condition

Min.

Typ.

Max.

Unit

∗

Input leakage current

ILI

 

-1

–

1

µA

 

Off-state leakage current

IOZ

 

-1

–

1

µA

 

High-level output voltage

VOH

IOH=-3mA (Type1), IOH=-12mA (Type3),

VDDE

–

–

V

 

 

 

VDDE=Min.

-0.4

 

 

 

 

Low-level output voltage

VOL

IOL=3mA (Type1), IOL=12mA (Type3),

–

–

0.4

V

 

 

 

VDDE=Min.

 

 

 

 

 

High-level input voltage

VIH

CMOS level, VDDE=Max.

3.5

–

–

V

 

Low-level input voltage

VIL

CMOS level, VDDE=Min.

–

–

1.0

V

 

Positive trigger input voltage

VT+

CMOS Schmitt

2.0

–

4.0

V

 

Negative trigger input voltage

VT-

CMOS Schmitt

0.8

–

3.1

V

 

Hysteresis voltage

VH

CMOS Schmitt

0.3

–

–

V

 

High-level input voltage

VIH2

TTL level, VDDE=Max.

2.0

–

–

V

 

Low-level input voltage

VIL2

TTL level, VDDE=Min.

–

–

0.8

V

 

Pull-up resistor

RPU

VI=0V

60

120

288

kΩ

 

Pull-down resistor

RPD

VI=VDDE (ICEMD)

30

60

144

kΩ

 

Input pin capacitance

CI

f=1MHz, VDDE=0V

–

–

10

pF

 

Output pin capacitance

CO

f=1MHz, VDDE=0V

–

–

10

pF

 

I/O pin capacitance

CIO

f=1MHz, VDDE=0V

–

–

10

pF

 

2) 3.3 V single power source

(Unless otherwise specified: VDDE=VDD=2.7V to 3.6V, Ta=-40°C to +85°C)

Item

Symbol

Condition

Min.

Typ.

Max.

Unit

∗

Static current consumption

IDDS

Static state, Tj=85°C

 

–

–

90

µA

 

Input leakage current

ILI

 

 

-1

–

1

µA

 

Off-state leakage current

IOZ

 

 

-1

–

1

µA

 

High-level output voltage

VOH

IOH=-2mA (Type1), IOH=-6mA (Type2),

VDD

–

–

V

 

 

 

IOH=-12mA (Type3), VDD=Min.

-0.4

 

 

 

 

Low-level output voltage

VOL

IOL=2mA (Type1), IOL=6mA (Type2),

–

–

0.4

V

 

 

 

IOL=12mA (Type3), VDD=Min.

 

 

 

 

 

High-level input voltage

VIH

CMOS level, VDD=Max.

 

2.0

–

–

V

 

Low-level input voltage

VIL

CMOS level, VDD=Min.

 

–

–

0.8

V

 

Positive trigger input voltage

VT+

LVTTL Schmitt

 

1.1

–

2.4

V

 

Negative trigger input voltage

VT-

LVTTL Schmitt

 

0.6

–

1.8

V

 

Hysteresis voltage

VH

LVTTL Schmitt

 

0.1

–

–

V

 

Pull-up resistor

RPU

VI=0V

Other than DSIO

80

200

480

kΩ

 

 

 

 

DSIO

40

100

240

kΩ

 

Pull-down resistor

RPD

VI=VDD (ICEMD)

 

40

100

240

kΩ

 

Input pin capacitance

CI

f=1MHz, VDD=0V

 

–

–

10

pF

 

Output pin capacitance

CO

f=1MHz, VDD=0V

 

–

–

10

pF

 

I/O pin capacitance

CIO

f=1MHz, VDD=0V

 

–

–

10

pF

 

Note: See Appendix B for pin characteristics.

A-1

A-8

S1C33L03 PRODUCT PART

EPSON

A-73