III PERIPHERAL BLOCK: CLOCK TIMER
RUN/STOP the clock timer
The clock timer starts counting when "1" is written to TCRUN (D0) / Clock timer Run/Stop register (0x40151) and stops counting when "0" is written.
When the clock timer is made to RUN, the
fOSC1/128 | 256 Hz | |
TCD0 | 128 Hz | |
TCD1 | 64 Hz | |
TCD2 | 32 Hz | |
TCD3 | 16 Hz | |
TCD4 | 8 Hz | |
TCD5 | 4 Hz | |
TCD6 | 2 Hz | |
TCD7 | 1 Hz | |
32 | Hz interrupt | |
8 | Hz interrupt | |
2 | Hz interrupt | |
1 | Hz interrupt |
Figure 7.2 Timing Chart of
The
The second counter counts the
Similarly, the minute and hour counters count 60 minutes and 24 hours, respectively, using the signals output by each preceding counter.
The day counter is a
One of the following signals output by each counter can be selected to generate an interrupt:
32 Hz, 8 Hz, 2 Hz, 1 Hz (1 second), 1 minute, 1 hour, 1 day
If "0" is written to TCRUN, the clock timer is stopped at a rising edge of the
Even when the clock timer is stopped, each counter retains the data set at that point. When the timer is made to RUN again while in that state, each counter restarts counting from the retained value.
Reading out counter data
The data in each counter can be read out in a software as binary data.
| Table 7.2 Reading Out Counter Data |
Counter | Counter data |
1 Hz to 128 Hz | TCD[7:0] (D[7:0]) / Clock timer divider register (0x40153) |
Second counter | TCMD[5:0] (D[5:0]) / Clock timer second counter (0x40154) |
Minute counter | TCHD[5:0] (D[5:0]) / Clock timer minute counter (0x40155) |
Hour counter | TCDD[4:0] (D[4:0]) / Clock timer hour counter (0x40156) |
Day counter | TCND[15:0](D[7:0]) / Clock timer day |
| (D[7:0]) / Clock timer day |
Data is read directly from the counter during operation. For this reason, a counter can overflow while reading data from each counter, so the data thus read may not be exact. For example, if the
CTM
S1C33L03 FUNCTION PART | EPSON |