IIIPERIPHERAL BLOCK: SERIAL INTERFACE

•Overrun error

If during successive receive operations, a receive operation for the next data is completed before the receive data register is read out, the receive data register is overwritten with the new data. Therefore, the receive data register must always be read out before a receive operation for the next data is completed.

When the receive data register is overwritten, an overrun error is generated and the overrun-error flag is set to "1".

Ch.0 overrun-error flag: OER0 (D2) / Serial I/F Ch.0 status register (0x401E2)

Ch.1 overrun-error flag: OER1 (D2) / Serial I/F Ch.1 status register (0x401E7)

Ch.2 overrun-error flag: OER2 (D2) / Serial I/F Ch.2 status register (0x401F2)

Ch.3 overrun-error flag: OER3 (D2) / Serial I/F Ch.3 status register (0x401F7)

Even when this error occurs, the received data in error is transferred to the receive data register and the receive operation is continued.

The OERx flag is reset to "0" by writing "0".

(4)Terminating receive operation

When a data receive operation is completed, write "0" to the receive-enable bit RXENx to disable receive operations.

B-III-8-20

EPSON

S1C33L03 FUNCTION PART