Epson S1C33L03 manual 236

II CORE BLOCK: ITC (Interrupt Controller)

I/O Memory of Interrupt Controller

Table 5.3 shows the control bits of the interrupt controller.

Table 5.3 Control Bits of Interrupt Controller

Register name	Address	Bit	Name	Function	Setting	Init.	R/W	Remarks
Port input 0/1	0040260	D7	–	reserved	–	–	–	0 when being read.
interrupt	(B)	D6	PP1L2	Port input 1 interrupt level	0 to 7	X	R/W
priority register		D5	PP1L1			X
		D4	PP1L0			X
		D3	–	reserved	–	–	–	0 when being read.
		D2	PP0L2	Port input 0 interrupt level	0 to 7	X	R/W
		D1	PP0L1			X
		D0	PP0L0			X
Port input 2/3	0040261	D7	–	reserved	–	–	–	0 when being read.
interrupt	(B)	D6	PP3L2	Port input 3 interrupt level	0 to 7	X	R/W
priority register		D5	PP3L1			X
		D4	PP3L0			X
		D3	–	reserved	–	–	–	0 when being read.
		D2	PP2L2	Port input 2 interrupt level	0 to 7	X	R/W
		D1	PP2L1			X
		D0	PP2L0			X
Key input	0040262	D7	–	reserved	–	–	–	0 when being read.
interrupt	(B)	D6	PK1L2	Key input 1 interrupt level	0 to 7	X	R/W
priority register		D5	PK1L1			X
		D4	PK1L0			X
		D3	–	reserved	–	–	–	0 when being read.
		D2	PK0L2	Key input 0 interrupt level	0 to 7	X	R/W
		D1	PK0L1			X
		D0	PK0L0			X
High-speed	0040263	D7	–	reserved	–	–	–	0 when being read.
DMA Ch.0/1	(B)	D6	PHSD1L2	High-speed DMA Ch.1	0 to 7	X	R/W
interrupt		D5	PHSD1L1	interrupt level		X
priority register		D4	PHSD1L0			X
		D3	–	reserved	–	–	–	0 when being read.
		D2	PHSD0L2	High-speed DMA Ch.0	0 to 7	X	R/W
		D1	PHSD0L1	interrupt level		X
		D0	PHSD0L0			X
High-speed	0040264	D7	–	reserved	–	–	–	0 when being read.
DMA Ch.2/3	(B)	D6	PHSD3L2	High-speed DMA Ch.3	0 to 7	X	R/W
interrupt		D5	PHSD3L1	interrupt level		X
priority register		D4	PHSD3L0			X
		D3	–	reserved	–	–	–	0 when being read.
		D2	PHSD2L2	High-speed DMA Ch.2	0 to 7	X	R/W
		D1	PHSD2L1	interrupt level		X
		D0	PHSD2L0			X
IDMA interrupt	0040265	D7–3	–	reserved	–	–	–	0 when being read.
priority register	(B)	D2	PDM2	IDMA interrupt level	0 to 7	X	R/W
		D1	PDM1			X
		D0	PDM0			X
16-bit timer 0/1	0040266	D7	–	reserved	–	–	–	0 when being read.
interrupt	(B)	D6	P16T12	16-bit timer 1 interrupt level	0 to 7	X	R/W
priority register		D5	P16T11			X
		D4	P16T10			X
		D3	–	reserved	–	–	–	0 when being read.
		D2	P16T02	16-bit timer 0 interrupt level	0 to 7	X	R/W
		D1	P16T01			X
		D0	P16T00			X
16-bit timer 2/3	0040267	D7	–	reserved	–	–	–	0 when being read.
interrupt	(B)	D6	P16T32	16-bit timer 3 interrupt level	0 to 7	X	R/W
priority register		D5	P16T31			X
		D4	P16T30			X
		D3	–	reserved	–	–	–	0 when being read.
		D2	P16T22	16-bit timer 2 interrupt level	0 to 7	X	R/W
		D1	P16T21			X
		D0	P16T20			X

B-II-5-12 EPSON S1C33L03 FUNCTION PART