VI SDRAM CONTROLLER BLOCK: INTRODUCTION

A-1

VI-1 INTRODUCTION

The SDRAM controller block provides a SDRAM interface that allows direct connection of external SDRAM chips via the BCU.

C33 Internal Memory Block

Internal RAM

(Area 0)

Internal ROM

(Area 10)

C33 DMA Block

C33 SDRAM Controller Block

C33 LCD Controller Block

C33_DMA

 

 

C33_SDRAMC

 

 

 

C33_LCDC

 

(IDMA, HSDMA)

 

 

(SDRAM interface)

 

 

 

(LCD panel interface)

 

 

Pads

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33_CORE

 

 

PAD

 

 

 

 

 

 

 

 

 

 

 

 

_

 

 

Pads

 

 

 

 

(CPU, BCU, ITC, CLG, DBG)

 

 

CORE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33_SBUS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33 Core Block

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33_ADC

 

 

C33_PERI

 

 

PAD

 

 

 

 

 

 

 

 

 

 

 

 

(A/D converter)

 

(Prescaler, 8-bit timer, 16-bit timer,

PERI

 

 

Pads

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clock timer, Serial interface, Ports)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33 Analog Block

 

 

C33 Peripheral Block

 

Figure 1.1 SDRAM Controller Block

Note: Internal ROM is not provided in the S1C33L03.

B-VI

Intro

S1C33L03 FUNCTION PART

EPSON

B-VI-1-1