VII LCD CONTROLLER BLOCK: LCD CONTROLLER
Programming Notes
(1)When the chip is set in HALT2 or SLEEP mode after the LCD controller is set in
(2)When LPWREN (D4)/LCDC mode register 2 (0x39FFE3) is used to control the LCDPWR output, be careful to ensure that LCD signals are not turned off while the power to the LCD panel remains on. During a power- down state in particular, allow a sufficient wait time, after dropping the LCDPWR output low for LCD
(3)
Precautions on Using ICD33
Follow the precautions described below when using the ICD33 (S5U1C33000H) for debugging an application, which uses this LCD controller.
1.When #WAIT is enabled, do not dump (including displays using the [Memory] window) or set the contents from/to the LCDC register area
When ICD33 is used for debugging, be sure to disable #WAIT (D0/0x4812E = "0") before the LCDC register area is accessed in a debugging operation or from the target program.
2.When the target program stops execution by a break factor during debugging with the ICD33, the LCD display goes off until the program resumes execution.
Therefore, do not use the ICD33 for debugging a target system, which uses an EPSON MLS driver for driving the LCD panel.
In this case, use the MON33 (S5U1C330M1D1) for debugging, since the LCD display does not go off in a break state so it allows debugging.
EPSON | S1C33L03 FUNCTION PART |