II CORE BLOCK: BCU (Bus Control Unit)

A-1

DRAM random write cycle

Example: RAS: 1 cycle; CAS: 2 cycles; Precharge: 1 cycle

 

 

 

Precharge

 

RAS cycle

CAS cycle

cycle

BCLK

 

 

 

A[11:0]

ROW

COL

 

#RASx

#HCAS/

#LCAS

#WE

D[15:0]

write data

Figure 4.32 2CAS Type DRAM Random Write Cycle

DRAM write cycle (fast page or EDO page mode)

Example: RAS: 1 cycle; CAS: 2 cycles; Precharge: 1 cycle; word-write sample

B-II

 

 

 

 

Precharge

 

RAS cycle

CAS cycle #1

CAS cycle #2

cycle

BCLK

 

 

 

 

A[11:0]

ROW

COL #1

COL #2

BCU

 

#RASx

#HCAS/

#LCAS

#WE

D[15:0]

write data

write data

Figure 4.33 DRAM Word-Write Cycle (fast page or EDO page mode)

Example: RAS: 1 cycle; CAS: 2 cycles; Precharge: 1 cycle; byte-write sample (little endian)

 

 

 

 

Precharge

 

RAS cycle

CAS cycle #1

CAS cycle #2

cycle

BCLK

 

 

 

 

A[11:0]

ROW

 

COL

 

#RASx

#HCAS

#LCAS

#WE

D[15:8]

Undefined

write data

D[7:0]

write data

Undefined

Figure 4.34 DRAM Byte-Write Cycle (fast page or EDO page mode)

S1C33L03 FUNCTION PART

EPSON

B-II-4-29