III PERIPHERAL BLOCK: PRESCALER

Register name

Address

Bit

Name

Function

 

 

 

 

Setting

Init.

R/W

Remarks

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8-bit timer 2/3

004014E

D7

P8TON3

8-bit timer 3 clock control

1

On

 

 

0

Off

0

R/W

 

clock control

(B)

D6

P8TS32

8-bit timer 3

P8TS3[2:0]

 

Division ratio

0

R/W

θ: selected by

register

 

D5

P8TS31

clock division ratio selection

1

 

1

1

 

 

θ/256

0

 

Prescaler clock select

 

 

D4

P8TS30

 

1

 

1

0

 

 

θ/128

0

 

register (0x40181)

 

 

 

 

 

1

 

0

1

 

 

θ/64

 

 

 

 

 

 

 

 

1

 

0

0

 

 

θ/32

 

 

8-bit timer 3 can

 

 

 

 

 

0

 

1

1

 

 

θ/16

 

 

generate the clock for

 

 

 

 

 

0

 

1

0

 

 

θ/8

 

 

the serial I/F Ch.1.

 

 

 

 

 

0

 

0

1

 

 

θ/4

 

 

 

 

 

 

 

 

0

 

0

0

 

 

θ/2

 

 

 

 

 

D3

P8TON2

8-bit timer 2 clock control

1

On

 

 

0

Off

0

R/W

 

 

 

D2

P8TS22

8-bit timer 2

P8TS2[2:0]

 

Division ratio

0

R/W

θ: selected by

 

 

D1

P8TS21

clock division ratio selection

1

 

1

1

 

 

θ/4096

0

 

Prescaler clock select

 

 

D0

P8TS20

 

1

 

1

0

 

 

θ/2048

0

 

register (0x40181)

 

 

 

 

 

1

 

0

1

 

 

θ/64

 

 

 

 

 

 

 

 

1

 

0

0

 

 

θ/32

 

 

8-bit timer 2 can

 

 

 

 

 

0

 

1

1

 

 

θ/16

 

 

generate the clock for

 

 

 

 

 

0

 

1

0

 

 

θ/8

 

 

the serial I/F Ch.0.

 

 

 

 

 

0

 

0

1

 

 

θ/4

 

 

 

 

 

 

 

 

0

 

0

0

 

 

θ/2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A/D clock

004014F

D7–4

–

reserved

 

 

 

 

 

–

 

–

–

0 when being read.

control register

(B)

D3

PSONAD

A/D converter clock control

1

On

 

 

0

Off

0

R/W

 

 

 

D2

PSAD2

A/D converter clock division ratio

P8TS0[2:0]

 

Division ratio

0

R/W

θ: selected by

 

 

D1

PSAD1

selection

1

 

1

1

 

 

θ/256

0

 

Prescaler clock select

 

 

D0

PSAD0

 

1

 

1

0

 

 

θ/128

0

 

register (0x40181)

 

 

 

 

 

1

 

0

1

 

 

θ/64

 

 

 

 

 

 

 

 

1

 

0

0

 

 

θ/32

 

 

 

 

 

 

 

 

0

 

1

1

 

 

θ/16

 

 

 

 

 

 

 

 

0

 

1

0

 

 

θ/8

 

 

 

 

 

 

 

 

0

 

0

1

 

 

θ/4

 

 

 

 

 

 

 

 

0

 

0

0

 

 

θ/2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Power control

0040180

D7

CLKDT1

System clock division ratio

CLKDT[1:0]

 

Division ratio

0

R/W

 

register

(B)

D6

CLKDT0

selection

1

 

 

1

 

 

1/8

0

 

 

 

 

 

 

 

1

 

 

0

 

 

1/4

 

 

 

 

 

 

 

 

0

 

 

1

 

 

1/2

 

 

 

 

 

 

 

 

0

 

 

0

 

 

1/1

 

 

 

 

 

D5

PSCON

Prescaler On/Off control

1

On

 

 

0

Off

1

R/W

 

 

 

D4–3

–

reserved

 

 

 

 

 

–

 

0

–

Writing 1 not allowed.

 

 

D2

CLKCHG

CPU operating clock switch

1

OSC3

 

0

OSC1

1

R/W

 

 

 

D1

SOSC3

High-speed (OSC3) oscillation On/Off

1

On

 

 

0

Off

1

R/W

 

 

 

D0

SOSC1

Low-speed (OSC1) oscillation On/Off

1

On

 

 

0

Off

1

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Prescaler clock

0040181

D7–1

–

reserved

 

 

 

 

 

–

 

0

–

 

select register

(B)

D0

PSCDT0

Prescaler clock selection

1

OSC1

 

0

OSC3/PLL

0

R/W

 

 

 

 

 

 

 

 

 

 

Power control

004019E

D7

CLGP7

Power control register protect flag

Writing 10010110 (0x96)

0

R/W

 

protect register

(B)

D6

CLGP6

 

removes the write protection of

0

 

 

 

 

D5

CLGP5

 

the power control register

0

 

 

 

 

D4

CLGP4

 

(0x40180) and the clock option

0

 

 

 

 

D3

CLGP3

 

register (0x40190).

 

0

 

 

 

 

D2

CLGP2

 

Writing another value set the

0

 

 

 

 

D1

CLGP1

 

write protection.

 

0

 

 

 

 

D0

CLGP0

 

 

 

 

 

 

 

 

 

0

 

 

PSCON: Prescaler on/off control (D5) / Power control register (0x40180)

Turns the prescaler on or off.

Write "1": On

Write "0": Off

Read: Valid

The source clock is input to the prescaler by writing "1" to PSCON, thereby starting a dividing operation.

The prescaler is turned off by writing "0". If the peripheral circuits do not need to be operated, write "0" to this bit to reduce current consumption. Since PSCON is protected against writing the same as SOSC1, SOSC3, CLKCHG and CLKDT[1:0], CLGP[7:0] must be set to "0b10010110" before PSCON can be changed.

In addition, writing "0" (Off) to PSCON stops supplying the source clock to the prescaler and stops the peripheral circuits that use the same clock (e.g., 16-bit programmable timers, 8-bit programmable timers, A/D converter, serial interface, and ports). Therefore, do not turn off the prescaler when these peripheral circuits are used.

At initial reset, PSCON is set to "1" (On).

A-1

B-III

PSC

S1C33L03 FUNCTION PART

EPSON

B-III-2-5