4 PERIPHERAL CIRCUITS
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Register name | Address | Bit | Name | Function |
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| Setting | Init. | R/W | Remarks |
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Port function | 00402DF | D7 | CFEX7 | P07 port extended function | 1 | #DMAEND3 |
| 0 | P07, etc. | 0 | R/W |
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extension | (B) | D6 | CFEX6 | P06 port extended function | 1 | #DMAACK3 |
| 0 | P06, etc. | 0 | R/W |
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register |
| D5 | CFEX5 | P05 port extended function | 1 | #DMAEND2 |
| 0 | P05, etc. | 0 | R/W |
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| D4 | CFEX4 | P04 port extended function | 1 | #DMAACK2 |
| 0 | P04, etc. | 0 | R/W |
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| D3 | CFEX3 | P31 port extended function | 1 | #GARD |
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| 0 | P31, etc. | 0 | R/W |
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| D2 | CFEX2 | P21 port extended function | 1 | #GAAS |
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| 0 | P21, etc. | 0 | R/W |
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| D1 | CFEX1 | P10, P11, P13 port extended | 1 | DST0 |
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| 0 | P10, etc. | 1 | R/W |
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| function |
| DST1 |
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| P11, etc. |
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| DPC0 |
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| P13, etc. |
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| D0 | CFEX0 | P12, P14 port extended function | 1 | DST2 |
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| 0 | P12, etc. | 1 | R/W |
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| DCLK |
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| P14, etc. |
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Areas | 0048120 | DF | – | reserved |
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| – |
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| – | – | 0 when being read. |
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(HW) | DE | A18SZ | Areas | 1 | 8 bits |
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| 0 | 16 bits | 0 | R/W |
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| DD | A18DF1 | Areas | A18DF[1:0] | Number of cycles | 1 | R/W |
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| DC | A18DF0 | output disable delay time | 1 |
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| 1 |
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| 3.5 | 1 |
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| 1 |
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| 0 |
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| 2.5 |
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| 0 |
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| 1 |
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| 1.5 |
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| 0 |
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| 0 |
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| 0.5 |
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| DB | – | reserved |
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| – |
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| – | – | 0 when being read. |
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| DA | A18WT2 | Areas | A18WT[2:0] |
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| Wait cycles | 1 | R/W |
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| D9 | A18WT1 |
| 1 |
| 1 | 1 |
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| 7 | 1 |
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| D8 | A18WT0 |
| 1 |
| 1 | 0 |
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| 6 | 1 |
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| 1 |
| 0 | 1 |
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| 5 |
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| 1 |
| 0 | 0 |
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| 4 |
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| 0 |
| 1 | 1 |
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| 3 |
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| 0 |
| 1 | 0 |
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| 2 |
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| 0 |
| 0 | 1 |
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| 1 |
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| 0 |
| 0 | 0 |
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| 0 |
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| D7 | – | reserved |
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| – |
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| – | – | 0 when being read. |
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| D6 | A16SZ | Areas | 1 | 8 bits |
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| 0 | 16 bits | 0 | R/W |
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| D5 | A16DF1 | Areas | A16DF[1:0] | Number of cycles | 1 | R/W |
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| D4 | A16DF0 | output disable delay time | 1 |
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| 1 |
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| 3.5 | 1 |
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| 1 |
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| 0 |
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| 2.5 |
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| 0 |
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| 1 |
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| 1.5 |
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| 0 |
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| 0 |
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| 0.5 |
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| D3 | – | reserved |
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| – |
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| – | – | 0 when being read. |
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| D2 | A16WT2 | Areas | A16WT[2:0] |
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| Wait cycles | 1 | R/W |
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| D1 | A16WT1 |
| 1 |
| 1 | 1 |
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| 7 | 1 |
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| D0 | A16WT0 |
| 1 |
| 1 | 0 |
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| 6 | 1 |
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| 1 |
| 0 | 1 |
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| 5 |
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| 1 |
| 0 | 0 |
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| 4 |
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| 0 |
| 1 | 1 |
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| 3 |
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| 0 |
| 1 | 0 |
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| 2 |
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| 0 |
| 0 | 1 |
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| 1 |
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| 0 |
| 0 | 0 |
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| 0 |
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Areas | 0048122 | – | reserved |
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| – |
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| – | – | 0 when being read. |
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(HW) | D8 | A14DRA | Area 14 DRAM selection | 1 | Used |
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| 0 | Not used | 0 | R/W |
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| D7 | A13DRA | Area 13 DRAM selection | 1 | Used |
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| 0 | Not used | 0 | R/W |
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| D6 | A14SZ | Areas | 1 | 8 bits |
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| 0 | 16 bits | 0 | R/W |
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| D5 | A14DF1 | Areas | A14DF[1:0] | Number of cycles | 1 | R/W |
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| D4 | A14DF0 | output disable delay time | 1 |
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| 1 |
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| 3.5 | 1 |
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| 1 |
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| 0 |
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| 2.5 |
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| 0 |
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| 1 |
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| 1.5 |
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| 0 |
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| 0 |
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| 0.5 |
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| D3 | – | reserved |
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| – |
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| – | – | 0 when being read. |
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| D2 | A14WT2 | Areas | A14WT[2:0] |
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| Wait cycles | 1 | R/W |
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| D1 | A14WT1 |
| 1 |
| 1 | 1 |
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| 7 | 1 |
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| D0 | A14WT0 |
| 1 |
| 1 | 0 |
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| 6 | 1 |
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| 1 |
| 0 | 1 |
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| 5 |
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| 1 |
| 0 | 0 |
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| 4 |
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| 0 |
| 1 | 1 |
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| 3 |
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| 0 |
| 1 | 0 |
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| 2 |
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| 0 |
| 0 | 1 |
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| 1 |
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| 0 |
| 0 | 0 |
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| 0 |
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S1C33L03 PRODUCT PART | EPSON |