4 PERIPHERAL CIRCUITS

Register name

Address

Bit

Name

Function

 

 

 

 

Setting

Init.

R/W

Remarks

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8-bit timer 2/3

004014E

D7

P8TON3

8-bit timer 3 clock control

1

On

 

 

 

0

Off

0

R/W

 

clock control

(B)

D6

P8TS32

8-bit timer 3

P8TS3[2:0]

 

 

Division ratio

0

R/W

θ : selected by

register

 

D5

P8TS31

clock division ratio selection

1

 

1

 

1

 

 

 

θ /256

0

 

Prescaler clock select

 

 

D4

P8TS30

 

1

 

1

 

0

 

 

 

θ /128

0

 

register (0x40181)

 

 

 

 

 

1

 

0

 

1

 

 

 

θ /64

 

 

 

 

 

 

 

 

1

 

0

 

0

 

 

 

θ /32

 

 

8-bit timer 3 can

 

 

 

 

 

0

 

1

 

1

 

 

 

θ /16

 

 

generate the clock for

 

 

 

 

 

0

 

1

 

0

 

 

 

θ /8

 

 

the serial I/F Ch.1.

 

 

 

 

 

0

 

0

 

1

 

 

 

θ /4

 

 

 

 

 

 

 

 

0

 

0

 

0

 

 

 

θ /2

 

 

 

 

 

D3

P8TON2

8-bit timer 2 clock control

1

On

 

 

 

0

Off

0

R/W

 

 

 

D2

P8TS22

8-bit timer 2

P8TS2[2:0]

 

 

Division ratio

0

R/W

θ : selected by

 

 

D1

P8TS21

clock division ratio selection

1

 

1

 

1

 

 

 

θ /4096

0

 

Prescaler clock select

 

 

D0

P8TS20

 

1

 

1

 

0

 

 

 

θ /2048

0

 

register (0x40181)

 

 

 

 

 

1

 

0

 

1

 

 

 

θ /64

 

 

 

 

 

 

 

 

1

 

0

 

0

 

 

 

θ /32

 

 

8-bit timer 2 can

 

 

 

 

 

0

 

1

 

1

 

 

 

θ /16

 

 

generate the clock for

 

 

 

 

 

0

 

1

 

0

 

 

 

θ /8

 

 

the serial I/F Ch.0.

 

 

 

 

 

0

 

0

 

1

 

 

 

θ /4

 

 

 

 

 

 

 

 

0

 

0

 

0

 

 

 

θ /2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A/D clock

004014F

D7–4

–

reserved

 

 

 

 

 

 

–

 

–

–

0 when being read.

control register

(B)

D3

PSONAD

A/D converter clock control

1

On

 

 

 

0

Off

0

R/W

 

 

 

D2

PSAD2

A/D converter clock division ratio

P8TS0[2:0]

 

 

Division ratio

0

R/W

θ : selected by

 

 

D1

PSAD1

selection

1

 

1

 

1

 

 

 

θ /256

0

 

Prescaler clock select

 

 

D0

PSAD0

 

1

 

1

 

0

 

 

 

θ /128

0

 

register (0x40181)

 

 

 

 

 

1

 

0

 

1

 

 

 

θ /64

 

 

 

 

 

 

 

 

1

 

0

 

0

 

 

 

θ /32

 

 

 

 

 

 

 

 

0

 

1

 

1

 

 

 

θ /16

 

 

 

 

 

 

 

 

0

 

1

 

0

 

 

 

θ /8

 

 

 

 

 

 

 

 

0

 

0

 

1

 

 

 

θ /4

 

 

 

 

 

 

 

 

0

 

0

 

0

 

 

 

θ /2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clock timer

0040151

D7–2

–

reserved

 

 

 

 

 

 

–

 

–

–

0 when being read.

Run/Stop

(B)

D1

TCRST

Clock timer reset

1

Reset

 

 

 

0

Invalid

X

W

0 when being read.

register

 

D0

TCRUN

Clock timer Run/Stop control

1

Run

 

 

 

0

Stop

X

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clock timer

0040152

D7

TCISE2

Clock timer interrupt factor

TCISE[2:0]

 

Interrupt factor

X

R/W

 

interrupt

(B)

D6

TCISE1

selection

1

 

1

 

1

 

 

 

None

X

 

 

control register

 

D5

TCISE0

 

1

 

1

 

0

 

 

 

Day

X

 

 

 

 

 

 

 

1

 

0

 

1

 

 

 

Hour

 

 

 

 

 

 

 

 

1

 

0

 

0

 

 

 

Minute

 

 

 

 

 

 

 

 

0

 

1

 

1

 

 

 

1 Hz

 

 

 

 

 

 

 

 

0

 

1

 

0

 

 

 

2 Hz

 

 

 

 

 

 

 

 

0

 

0

 

1

 

 

 

8 Hz

 

 

 

 

 

 

 

 

0

 

0

 

0

 

 

 

32 Hz

 

 

 

 

 

D4

TCASE2

Clock timer alarm factor selection

TCASE[2:0]

 

 

Alarm factor

X

R/W

 

 

 

D3

TCASE1

 

1

 

X

 

X

 

 

 

Day

X

 

 

 

 

D2

TCASE0

 

X

 

1

 

X

 

 

 

Hour

X

 

 

 

 

 

 

 

X

 

X

 

1

 

 

 

Minute

 

 

 

 

 

 

 

 

0

 

0

 

0

 

 

 

None

 

 

 

 

 

D1

TCIF

Interrupt factor generation flag

1

Generated

 

0

Not generated

X

R/W

Reset by writing 1.

 

 

D0

TCAF

Alarm factor generation flag

1

Generated

 

0

Not generated

X

R/W

Reset by writing 1.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clock timer

0040153

D7

TCD7

Clock timer data 1 Hz

1

High

 

 

 

0

Low

X

R

 

divider register

(B)

D6

TCD6

Clock timer data 2 Hz

1

High

 

 

 

0

Low

X

R

 

 

 

D5

TCD5

Clock timer data 4 Hz

1

High

 

 

 

0

Low

X

R

 

 

 

D4

TCD4

Clock timer data 8 Hz

1

High

 

 

 

0

Low

X

R

 

 

 

D3

TCD3

Clock timer data 16 Hz

1

High

 

 

 

0

Low

X

R

 

 

 

D2

TCD2

Clock timer data 32 Hz

1

High

 

 

 

0

Low

X

R

 

 

 

D1

TCD1

Clock timer data 64 Hz

1

High

 

 

 

0

Low

X

R

 

 

 

D0

TCD0

Clock timer data 128 Hz

1

High

 

 

 

0

Low

X

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clock timer

0040154

D7–6

–

reserved

 

 

 

 

 

 

–

 

–

–

0 when being read.

second

(B)

D5

TCMD5

Clock timer second counter data

 

 

0 to 59 seconds

X

R

 

register

 

D4

TCMD4

TCMD5 = MSB

 

 

 

 

 

 

 

 

 

X

 

 

 

 

D3

TCMD3

TCMD0 = LSB

 

 

 

 

 

 

 

 

 

X

 

 

 

 

D2

TCMD2

 

 

 

 

 

 

 

 

 

 

X

 

 

 

 

D1

TCMD1

 

 

 

 

 

 

 

 

 

 

X

 

 

 

 

D0

TCMD0

 

 

 

 

 

 

 

 

 

 

X

 

 

A-1

A-4

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