V DMA BLOCK: INTRODUCTION

A-1

V-1 INTRODUCTION

The DMA Block is configured with two types of DMA controllers: HSDMA (High-Speed DMA) that has on- chip registers for controlling DMA command information and IDMA (Intelligent DMA) that uses a memory area for storing DMA command information.

C33 Internal Memory Block

Internal RAM

(Area 0)

Internal ROM

(Area 10)

C33 DMA Block

C33 SDRAM Controller Block

C33 LCD Controller Block

C33_DMA

 

 

C33_SDRAMC

 

 

C33_LCDC

 

(IDMA, HSDMA)

 

 

(SDRAM interface)

 

 

 

(LCD panel interface)

 

 

Pads

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33_CORE

 

 

PAD

 

 

 

 

 

 

 

 

 

 

 

 

_

 

 

Pads

 

 

 

 

(CPU, BCU, ITC, CLG, DBG)

 

 

CORE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33_SBUS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33 Core Block

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33_ADC

 

 

C33_PERI

 

 

PAD

 

 

 

 

 

 

 

 

 

 

 

 

(A/D converter)

 

(Prescaler, 8-bit timer, 16-bit timer,

PERI

 

 

Pads

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clock timer, Serial interface, Ports)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33 Analog Block

 

 

C33 Peripheral Block

 

Figure 1.1 DMA Block

Note: Internal ROM is not provided in the S1C33L03.

B-V

Intro

S1C33L03 FUNCTION PART

EPSON

B-V-1-1