Epson S1C33L03 manual 114

8 ELECTRICAL CHARACTERISTICS
Sync Timing	t1	t2
Frame Pulse
	t4	t3
Line Pulse
t5
DRDY (MOD)
Data Timing
Line Pulse
t6	t8		t9
t7	t14	t11	t10
Shift Pulse
	t12	t13
FPDAT[7:4]		1	2

Note: For this timing diagram FPSMASK (D2/0x39FFE1) is set to "1".

4-bit Single Monochrome Panel AC Timing

Symbol	Parameter	Min.	Typ.	Max.	Unit
t1	Frame Pulse setup to Line Pulse falling edge	note 2			(note 1)
t2	Frame Pulse hold from Line Pulse falling edge	9			Ts
t3	Line Pulse period	note 3
t4	Line Pulse width	9			Ts
t5	MOD delay from Line Pulse rising edge	1			Ts
t6	Shift Pulse falling edge to Line Pulse rising edge	note 4
t7	Shift Pulse falling edge to Line Pulse falling edge	note 5
t8	Line Pulse falling edge to Shift Pulse falling edge	t14+2			Ts
t9	Shift Pulse period	4			Ts
t10	Shift Pulse width low	2			Ts
t11	Shift Pulse width high	2			Ts
t12	FPDAT[7:4] setup to Shift Pulse falling edge	2			Ts
t13	FPDAT[7:4] hold from Shift Pulse falling edge	2			Ts
t14	Line Pulse falling edge to Shift Pulse rising edge	23			Ts

note) 1.Ts	= pixel clock period
2.t1min	= t3min - 9 (Ts)
3.t3min	= (LDHSIZE[5:0] + 1) ⋅			16 + (HNDP[4:0] + 4) ⋅ 8 (Ts)
4.t6min	= HNDP[4:0] ⋅	8	+ 2 (Ts)
5.t7min	= HNDP[4:0] ⋅	8	+ 11	(Ts)

A-98 EPSON S1C33L03 PRODUCT PART