V DMA BLOCK: IDMA (Intelligent DMA)
Trap vector
The trap vector address for an interrupt upon completion of IDMA transfer by default is set to 0x0C00068. The trap table base address can be changed using the TTBR registers (0x48134 to 0x48137).
I/O Memory of Intelligent DMA
Table 3.3 shows the control bits of IDMA.
Table 3.3 Control Bits of IDMA
Register name | Address | Bit | Name | Function |
| Setting |
| Init. | R/W | Remarks | ||
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IDMA interrupt | 0040265 | – | reserved |
|
| – |
| – | – | 0 when being read. | ||
priority register | (B) | D2 | PDM2 | IDMA interrupt level |
| 0 to 7 |
| X | R/W |
| ||
|
| D1 | PDM1 |
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| X |
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| D0 | PDM0 |
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| X |
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DMA interrupt | 0040271 | – | reserved |
|
| – |
| – | – | 0 when being read. | ||
enable register | (B) | D4 | EIDMA | IDMA | 1 | Enabled |
| 0 | Disabled | 0 | R/W |
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| D3 | EHDM3 |
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| 0 | R/W |
| |
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| D2 | EHDM2 |
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| 0 | R/W |
| |
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| D1 | EHDM1 |
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| 0 | R/W |
| |
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| D0 | EHDM0 |
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| 0 | R/W |
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DMA interrupt | 0040281 | – | reserved |
|
| – |
| – | – | 0 when being read. | ||
factor flag | (B) | D4 | FIDMA | IDMA | 1 | Factor is |
| 0 | No factor is | X | R/W |
|
register |
| D3 | FHDM3 |
| generated |
|
| generated | X | R/W |
| |
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| D2 | FHDM2 |
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| X | R/W |
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| D1 | FHDM1 |
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| X | R/W |
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| D0 | FHDM0 |
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| X | R/W |
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IDMA base | 0048200 | DF | DBASEL15 | IDMA base address |
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| 0 | R/W |
|
address low- | (HW) | DE | DBASEL14 |
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| 0 |
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| |
order register |
| DD | DBASEL13 | (Initial value: 0x0C003A0) |
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| 0 |
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| DC | DBASEL12 |
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| 0 |
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| DB | DBASEL11 |
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| 0 |
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| DA | DBASEL10 |
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| 0 |
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| D9 | DBASEL9 |
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| 1 |
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| D8 | DBASEL8 |
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| 1 |
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| D7 | DBASEL7 |
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| 1 |
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| D6 | DBASEL6 |
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| 0 |
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| D5 | DBASEL5 |
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| 1 |
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| D4 | DBASEL4 |
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| 0 |
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| D3 | DBASEL3 |
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| 0 |
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| D2 | DBASEL2 |
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| 0 |
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| D1 | DBASEL1 |
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| 0 |
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| D0 | DBASEL0 |
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| 0 |
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IDMA base | 0048202 | – | reserved |
|
| – |
| – | – | Undefined in read. | ||
address | (HW) | DB | DBASEH11 | IDMA base address |
|
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| 0 | R/W |
|
| DA | DBASEH10 |
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| 0 |
|
| ||
register |
| D9 | DBASEH9 | (Initial value: 0x0C003A0) |
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| 0 |
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| D8 | DBASEH8 |
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| 0 |
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| D7 | DBASEH7 |
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| 1 |
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| D6 | DBASEH6 |
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| 1 |
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| D5 | DBASEH5 |
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| 0 |
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| D4 | DBASEH4 |
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| 0 |
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| D3 | DBASEH3 |
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| 0 |
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| D2 | DBASEH2 |
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| 0 |
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| D1 | DBASEH1 |
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| 0 |
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| D0 | DBASEH0 |
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| 0 |
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IDMA start | 0048204 | D7 | DSTART | IDMA start | 1 | IDMA start |
| 0 | Stop | 0 | R/W |
|
register | (B) | DCHN | IDMA channel number |
| 0 to 127 | 0 | R/W |
| ||||
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| |
IDMA enable | 0048205 | – | reserved |
|
| – |
| – | – |
| ||
register | (B) | D0 | IDMAEN | IDMA enable | 1 | Enabled |
| 0 | Disabled | 0 | R/W |
|
EPSON | S1C33L03 FUNCTION PART |