8 ELECTRICAL CHARACTERISTICS

A-1

SRAM read cycle

1) 3.3 V/5.0 V dual power source

(Unless otherwise specified: VDDE=5.0V±0.5V, VDD=2.7V to 3.6V, VSS=0V, Ta=-40°C to +85°C)

 

Item

 

Symbol

Min.

Max.

Unit

 

 

Read signal delay time (2)

 

tRDD2

 

8

ns

 

 

 

Read signal pulse width

 

tRDW

tCYC(0.5+WC)-8

 

ns

 

 

 

Read address access time (1)

 

tACC1

 

tCYC(1+WC)-20

ns

 

 

 

Chip enable access time (1)

 

tCEAC1

 

tCYC(1+WC)-20

ns

 

A-8

 

Read signal access time (1)

 

tRDAC1

 

tCYC(0.5+WC)-20

ns

 

2) 3.3 V single power source

 

 

 

 

 

 

 

 

 

(Unless otherwise specified: VDDE=VDD=2.7V to 3.6V, VSS=0V, Ta=-40°C to +85°C)

 

Item

 

Symbol

Min.

Max.

Unit

 

 

Read signal delay time (2)

 

tRDD2

 

10

ns

 

 

 

Read signal pulse width

 

tRDW

tCYC(0.5+WC)-10

 

ns

 

 

 

Read address access time (1)

 

tACC1

 

tCYC(1+WC)-25

ns

 

 

 

Chip enable access time (1)

 

tCEAC1

 

tCYC(1+WC)-25

ns

 

 

 

Read signal access time (1)

 

tRDAC1

 

tCYC(0.5+WC)-25

ns

 

 

3) 2.0 V single power source

 

 

 

 

 

 

 

 

 

(Unless otherwise specified: VDDE=VDD=2.0V±0.2V, VSS=0V, Ta=-40°C to +85°C)

 

Item

 

Symbol

Min.

Max.

Unit

 

 

Read signal delay time (2)

 

tRDD2

 

10

ns

 

 

 

Read signal pulse width

 

tRDW

tCYC(0.5+WC)-10

 

ns

 

 

 

Read address access time (1)

 

tACC1

 

tCYC(1+WC)-60

ns

 

 

 

Chip enable access time (1)

 

tCEAC1

 

tCYC(1+WC)-60

ns

 

 

 

Read signal access time (1)

 

tRDAC1

 

tCYC(0.5+WC)-60

ns

 

 

SRAM write cycle

1) 3.3 V/5.0 V dual power source

(Unless otherwise specified: VDDE=5.0V±0.5V, VDD=2.7V to 3.6V, VSS=0V, Ta=-40°C to +85°C)

 

Item

 

Symbol

Min.

Max.

Unit

 

 

Write signal delay time (2)

 

tWRD2

 

8

ns

 

 

 

Write signal pulse width

 

tWRW

tCYC(1+WC)-10

 

ns

 

 

2) 3.3 V single power source

 

 

 

 

 

 

 

 

 

(Unless otherwise specified: VDDE=VDD=2.7V to 3.6V, VSS=0V, Ta=-40°C to +85°C)

 

Item

 

Symbol

Min.

Max.

Unit

 

 

Write signal delay time (2)

 

tWRD2

 

10

ns

 

 

 

Write signal pulse width

 

tWRW

tCYC(1+WC)-10

 

ns

 

 

3) 2.0 V single power source

 

 

 

 

 

 

 

 

 

(Unless otherwise specified: VDDE=VDD=2.0V±0.2V, VSS=0V, Ta=-40°C to +85°C)

 

Item

 

Symbol

Min.

Max.

Unit

 

 

Write signal delay time (2)

 

tWRD2

 

20

ns

 

 

 

Write signal pulse width

 

tWRW

tCYC(1+WC)-20

 

ns

 

 

S1C33L03 PRODUCT PART

EPSON

A-81