8 ELECTRICAL CHARACTERISTICS

8-bit single monochrome panel timing

 

A-1

 

 

 

 

VDP

 

VNDP

FPFRAME

 

 

 

 

FPLINE

 

 

 

 

DRDY (MOD)

 

 

 

 

FPDAT[7:0]

 

Line 1 Line 2 Line 3 Line 4

Line 479 Line 480

Line 1 Line 2

 

 

 

 

A-8

FPLINE

 

 

 

 

DRDY (MOD)

 

 

 

 

 

 

HDP

 

HNDP

FPSHIFT

 

 

 

 

FPDAT7

1-1

1-9

 

1-633

FPDAT6

1-2

1-10

 

1-634

FPDAT5

1-3

1-11

 

1-635

FPDAT4

1-4

1-12

 

1-636

FPDAT3

1-5

1-13

 

1-637

FPDAT2

1-6

1-14

 

1-638

FPDAT1

1-7

1-15

 

1-639

FPDAT0

1-8

1-16

 

1-640

∗Diagram drawn with 2 FPLINE vertical blank period Example timing for a 640 ⋅ 480 panel

For this timing diagram FPSMASK (D2/0x39FFE1) is set to "1"

VDP

= Vertical Display Period

= LDVSIZE[9:0] + 1 (lines)

 

 

LDVSIZE[9:0] (0x39FFE5, D[1:0]/0x39FFE6)

VNDP

= Vertical Non-Display Period

= VNDP[5:0] (lines)

 

 

VNDP[5:0] (D[5:0]/0x39FFEA)

HDP

= Horizontal Display Period

= (LDHSIZE[5:0] + 1) ⋅ 16 (Ts)

 

 

LDHSIZE[5:0] (D[5:0]/0x39FFE4)

HNDP

= Horizontal Non-Display Period

= (HNDP[4:0] + 4) ⋅ 8 (Ts)

 

 

HNDP[4:0] (D[4:0]/0x39FFE7)

S1C33L03 PRODUCT PART

EPSON

A-99