System Control Coprocessor

 

 

Table 4-34 Access data permission bit encoding (continued)

 

 

 

 

AP bit values

Privileged permissions

User permissions

Description

 

 

 

 

b011

Read/write

Read/write

Full access

 

 

 

 

b100

UNP

UNP

Reserved

 

 

 

 

b101

Read-only

No access

Privileged read-only

 

 

 

 

b110

Read-only

Read-only

Privileged/User read-only

 

 

 

 

b111

UNP

UNP

Reserved

 

 

 

 

To access the MPU Region Access Control Registers read or write CP15 with:

MRC p15, 0, <Rd>, c6, c1, 4 ; Read Region access control Register

MCR p15, 0, <Rd>, c6, c1, 4 ; Write Region access control Register

To execute instructions in User and Privileged modes:

the region must have read access as defined by the AP bits

the XN bit must be set to 0.

c6, MPU Memory Region Number Register

The MPU Region Registers are multiple registers with one register for each memory region implemented. The value contained in the MPU Memory Region Number Register determines which of the multiple registers is accessed.

The MPU Memory Region Number Registers are:

read/write register

accessible in Privileged mode only.

Figure 4-37shows the arrangement of bits in the register.

31

4

3

0

Reserved

Region

Figure 4-37 MPU Memory Region Number Register format

Table 4-35shows how the bit values correspond with the MPU Memory Region Number Register bits.

 

 

Table 4-35 MPU Memory Region Number Register bit functions

 

 

 

Bits

Field

Function

 

 

 

[31:4]

Reserved

SBZ.

 

 

 

[3:0]

Region

Defines the group of registers to be accessed. Read the MPU Type Register to determine the number

 

 

of supported regions, see c0, MPU Type Register on page 4-17.

 

 

 

To access the MPU Memory Region Number Register, read or write CP15 with:

MRC p15, 0, <Rd>, c6, c2, 0 ; Read MPU Memory Region Number Register

MCR p15, 0, <Rd>, c6, c2, 0 ; Write MPU Memory Region Number Register

Writing this register with a value greater than or equal to the number of regions from the MPU Type Register is Unpredictable. Associated register bank accesses are also Unpredictable.

ARM DDI 0363E

Copyright © 2009 ARM Limited. All rights reserved.

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ARM r1p3, R4F manual C6, MPU Memory Region Number Register, Access data permission bit encoding, Unp