Programmer’s Model

For more information on the operation of the IT execution state bits, see the ARM Architecture Reference Manual.

2.7.4The J bit

The J bit in the CPSR returns 0 when read.

Note

You cannot use an MSR to change the J bit in the CPSR.

2.7.5The DNM bits

Software must not modify the Do Not Modify (DNM) bits. These bits are:

Readable, to preserve the state of the processor, for example, during process context switches.

Writable, to enable the processor to restore its state. To maintain compatibility with future ARM processors, and as good practice, use a read-modify-write strategy when you change the CPSR.

2.7.6The GE bits

Some of the SIMD instructions set GE[3:0] as greater-than-or-equal bits for individual halfwords or bytes of the result, as Table 2-2shows.

Table 2-2 GE[3:0] settings

 

 

 

GE[3]

GE[2]

GE[1]

GE[0]

 

Instruction

A op B greater than

A op B greater than

A op B greater

A op B greater

 

or equal to C

or equal to C

than or equal to C

than or equal to C

 

 

 

 

 

 

 

 

 

 

 

Signed

 

 

 

 

 

 

SADD16

[31:16] + [31:16] ≥ 0

[31:16] + [31:16] ≥ 0

[15:0] + [15:0] ≥ 0

[15:0] + [15:0] ≥ 0

 

 

 

 

 

 

 

 

 

SSUB16

[31:16] - [31:16] ≥ 0

[31:16] - [31:16] ≥ 0

[15:0] - [15:0] ≥ 0

[15:0] - [15:0] ≥ 0

 

 

 

 

 

 

 

 

 

SADDSUBX

[31:16] + [15:0] ≥ 0

[31:16] + [15:0] ≥ 0

[15:0] - [31:16] ≥ 0

[15:0] - [31:16] ≥ 0

 

 

 

 

 

 

 

 

 

SSUBADDX

[31:16] - [15:0] ≥ 0

[31:16] - [15:0] ≥ 0

[15:0] + [31:16] ≥ 0

[15:0] + [31:16] ≥ 0

 

 

 

 

 

 

 

 

 

SADD8

[31:24] + [31:24] ≥ 0

[23:16] + [23:16] ≥ 0

[15:8] + [15:8] ≥ 0

[7:0] + [7:0] ≥ 0

 

 

 

 

 

 

 

 

 

SSUB8

[31:24] - [31:24] ≥ 0

[23:16] - [23:16] ≥ 0

[15:8] - [15:8] ≥ 0

[7:0] - [7:0] ≥ 0

 

 

 

 

 

 

 

Unsigned

 

 

 

 

 

 

UADD16

[31:16] + [31:16] ≥ 216

[31:16] + [31:16] ≥ 216

[15:0] + [15:0] ≥ 216

[15:0] + [15:0] ≥ 216

 

 

USUB16

[31:16] - [31:16] ≥ 0

[31:16] - [31:16] ≥ 0

[15:0] - [15:0] ≥ 0

[15:0] - [15:0] ≥ 0

 

 

 

 

 

 

 

 

 

UADDSUBX

[31:16] + [15:0] ≥ 216

[31:16] + [15:0] ≥ 216

[15:0] - [31:16] ≥ 0

[15:0] - [31:16] ≥ 0

 

 

USUBADDX

[31:16] - [15:0] ≥ 0

[31:16] - [15:0] ≥ 0

[15:0] + [31:16] ≥ 216

[15:0] + [31:16] ≥216

 

 

UADD8

[31:24] + [31:24] ≥ 28

[23:16] + [23:16] ≥ 28

[15:8] + [15:8] ≥ 28

[7:0] + [7:0] ≥ 28

 

 

USUB8

[31:24] - [31:24] ≥ 0

[23:16] - [23:16] ≥ 0

[15:8] - [15:8] ≥ 0

[7:0] - [7:0] ≥ 0

 

 

 

 

 

 

 

 

 

 

 

 

ARM DDI 0363E

Copyright © 2009 ARM Limited. All rights reserved.

2-12

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Non-Confidential, Unrestricted Access

 

 

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ARM R4F, r1p3 manual J bit, DNM bits, GE bits