ARM R4F, r1p3 manual Operating System Lock Status Register, Accessed

Debug

Table 11-20 Watchpoint Control Registers functions (continued)

Bits Field Function

[12:5] Byte address select

The WVR is programmed with word-aligned address. You can use this field to program the watchpoint so it only hits if certain byte addresses are accessed:

b00000000 The watchpoint never hits.

bxxxxxxx1 The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFFC) +0 is accessed.

bxxxxxx1x The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFFC) +1 is accessed.

bxxxxx1xx	The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFFC) +2 is
	accessed.
bxxxx1xxx	The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFFC) +3 is
	accessed.
bxxx1xxxx	The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFF8) +4 is
	accessed.
bxx1xxxxx	The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFF8) +5 is
	accessed.
bx1xxxxxx	The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFF8) +6 is
	accessed.
b1xxxxxxx	The watchpoint hits if the byte at address (WVR[31:0] & 0xFFFFFFF8) +7 is
	accessed.

[4:3]	L/S	Load/store access. The watchpoint can be conditioned to the type of access:
		b00	= Reserved
		b01	= load, load exclusive, or swap
		b10	= store, store exclusive or swap
		b11 = either.
		A SWP or SWPB triggers on load, store, or either. A load exclusive instruction triggers on load or
		either. A store exclusive instruction triggers on store or either, whether it succeeds or not.
[2:1]	S	Privileged access control. The watchpoint can be conditioned to the privilege of the access:
		b00	= reserved
		b01	= Privileged, match if the processor does a privileged access to memory
		b10	= User, match only on non-privileged accesses
		b11 = either, match all accesses.
				Note
		For all cases, the match refers to the privilege of the access, not the mode of the processor.
[0]	W	Watchpoint enable:
		0 = Watchpoint disabled. This is the reset value.
		1 = Watchpoint enabled.

11.4.16 Operating System Lock Status Register

The Operating System Lock Status Register (OSLSR) contains status information about the locked debug registers.

Figure 11-12 on page 11-29shows the bit arrangement of the OSLSR.

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