ARM R4F, r1p3 manual Watchpoint Value Registers, Watchpoint Control Registers

	Debug
	Table 11-18 Meaning of BVR bits [22:20] (continued)
BVR[22:20]	Meaning
b011	The corresponding BVR[31:0] is compared against CP15 Context ID Register, c13. This BRP links
	another BRP (of the BCR[21:20]=b01 type), or WRP (with WCR[20]=b1). They generate a breakpoint
	or watchpoint debug event on a joint instruction address or data address and context ID match. For this
	BRP, BCR[8:5] must be set to b1111, BCR[15:14] must be set to b00, and BCR[2:1] must be set to b11.
	Otherwise it is Unpredictable whether a breakpoint debug event is generated.
b100	The corresponding BVR[31:2] and BCR[8:5] are compared against the instruction address bus and the
	state of the processor against this BCR. It generates a breakpoint debug event on a joint instruction
	address mismatch and state match.
b101	The corresponding BVR[31:2] and BCR[8:5] are compared against the instruction address bus and the
	state of the processor against this BCR. This BRP is linked with the one indicated by BCR[19:16] linked
	BRP field. It generates a breakpoint debug event on a joint instruction address mismatch, state and
	context ID match.
b11x	Reserved. The behavior is Unpredictable.

11.4.14 Watchpoint Value Registers

Each WVR is associated with a Watchpoint Control Register (WCR). WCRy is the corresponding register for WVRy.

A pair of watchpoint registers, WVRy and WCRy, is called a Watchpoint Register Pair (WRP). WVR0-7 are paired with WCR0-7 to make WRP0-7.

The watchpoint value contained in the WVR always corresponds to a data address and can be set either on:

•a data address

•a data address and context ID pair.

For a data address and context ID pair, a WRP and a BRP with context ID comparison capability must be linked. A debug event is generated when both the data address and the context ID pair match simultaneously. Table 11-19shows the bit field definitions for the Watchpoint Value Registers.

Table 11-19 Watchpoint Value Registers functions

Bits Description

[31:2] Watchpoint address.

[1:0] Reserved. Do not modify on writes. On reads, the value returns zero.

11.4.15 Watchpoint Control Registers

The WCRs contain the necessary control bits for setting:

•watchpoints

•linked watchpoints.

Figure 11-11 on page 11-27shows the bit arrangement of the Watchpoint Control Registers.

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