FPU Programmer’s Model

12.3System registers

The VFPv3 architecture describes the following system registers:

Floating-Point System ID Register, FPSID on page 12-5

Floating-Point Status and Control Register, FPSCR on page 12-6

Floating-Point Exception Register, FPEXC on page 12-7

Media and VFP Feature Registers, MVFR0 and MVFR1 on page 12-8.

Table 12-1shows the VFP system registers in the Cortex-R4F FPU.

Table 12-1 VFP system registers

Register

FMXR/FMRX <reg> field

Access type

Reset state

 

 

 

 

Floating-Point System ID Register, FPSID

b0000

Read-only

0x4102314xa

Floating-Point Status and Control Register, FPSCR

b0001

Read/write

0x00000000

 

 

 

 

Floating-Point Exception Register, FPEXC

b1000

Read/write

0x00000000

 

 

 

 

VFP Feature Register 0, MVFR0

b0111

Read-only

0x10110221

 

 

 

 

VFP Feature Register 1, MVFR1

b0110

Read-only

0x00000001

a. Bits [3:0] of the FPSID depend on the product revision. See the FPSID register description for more information.

Note

The FPSID, MVFR0, and MVFR1 Registers are read-only. Attempts to write these registers are ignored.

Table 12-2shows that some of the VFP system registers can only be accessed in Privileged modes.

Table 12-2 Accessing VFP system registers

 

Privileged access

User access

Register

FPEXC EN=0

FPEXC EN=1

FPEXC EN=0

FPEXC EN=1

 

 

 

 

 

FPSID

Permitted

Permitted

Not permitted

Not permitted

 

 

 

 

 

FPSCR

Not permitted

Permitted

Not permitted

Permitted

 

 

 

 

 

MVFR0, MVFR1

Permitted

Permitted

Not permitted

Not permitted

 

 

 

 

 

FPEXC

Permitted

Permitted

Not permitted

Not permitted

 

 

 

 

 

Table 12-2shows that a Privileged mode is sometimes required to access a VFP system register. When a Privileged mode is required, an instruction that attempts to access a register in a nonprivileged mode takes the Undefined Instruction exception.

For a VFP system register to be accessible, it must follow the rules in Table 12-2and the VFP must also be accessible according to the Coprocessor Access Register. See c1, Coprocessor Access Register on page 4-44for more information.

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ARM R4F, r1p3 manual System registers, VFPv3 architecture describes the following system registers