ARM R4F, r1p3 manual Correctable errors, Types of aborts Conditions Source Precise Fatal, Axi

Level One Memory System

reprogramming the MPU to reflect this. Alternatively, an imprecise external abort might indicate that a software error meant that a store instruction occurred to an unmapped memory address. Such an abort is fatal to the system or process because no information is recorded about the address the error occurred on, or the instruction which caused the error.

Table 8-1shows which types of abort are typically fatal because either the location of the error is not recorded or the error is unrecoverable. Some aborts that are marked as not fatal might turn out to be fatal in some systems when the cause of the error has been determined. For example, an MPU background fault might indicate a stack overflow, which can be rectified, or it might indicate that, because of a bug, the software has accessed a nonexistent memory location, which can be fatal. These cases can be distinguished by determining the location where the error occurred. If an error is unrecoverable, that is, it is not a correctable parity or ECC error, and it is not a TCM external retry request, it is normally fatal regardless of whether or not the location of the error is recorded. When an abort is taken on an external TCM, parity, or ECC error, the appropriate Auxiliary Fault Status Register records whether the error was recoverable. See Fault Status and Address Registers on page 4-45.

Table 8-1 Types of aborts

Type	Conditions	Source	Precise	Fatal
MPU fault	Access not permitted by MPUa	MPU	Yes	No
Precise External	Load using L2 memory interface	AXI	Yes	No
Imprecise External	Store to Normal or Device memory using L2 memory	AXI	No	Yes
	interface
Precise Parity/ECC Cache	Load from cacheb	Cache	Yes	Maybec
Precise Parity/ECC TCM	Load/store from/to TCMd	TCM	Yes	Maybec
Precise TCM external error	Load/store from/to TCMe	TCM	Yes	Yes
Imprecise Parity/ECC Cache	Store to cache or cache maintenance operationb	Cache	No	Maybec
Imprecise TCM external	Store to TCMe	TCM	No	Yes
error

a.See MPU faults on page 7-12 for more information about the types of MPU fault.

b.See Cache error detection and correction on page 8-20 for more information about parity/ECC errors from the cache.

c.These types of error can be correctable or uncorrectable. Uncorrectable errors are typically fatal. Correctable errors are automatically corrected by the hardware and might not cause the abort handler to be called. See Cache error detection and correction on page 8-20and TCM internal error detection and correction on page 8-14.

d.See TCM internal error detection and correction on page 8-14 for more information about parity/ECC errors from the TCM.

e.Aborts generated by external TCM errors are always unrecoverable, and therefore fatal, see External TCM errors on page 8-16for more information about external errors from the TCM.

Correctable errors

In a system in which the processor is configured to automatically correct ECC errors without taking an abort exception, you can still configure it to respond to such errors. Connect the event output or outputs that indicate a correctable error to an interrupt controller. When such an event occurs, the interrupt input to the processor is set, and the processor will take an interrupt exception. When your interrupt handler has identified the source of the interrupt as a correctable error, it can read the CFLR to determine where the ECC error occurred. You can examine this information to identify trends in such errors. By masking the interrupt when necessary, your software can ensure that when critical code is executing, the processor corrects the error automatically, but delays examining information about the error until after the critical code has completed.

ARM DDI 0363E	Copyright © 2009 ARM Limited. All rights reserved.	8-11
ID013010	Non-Confidential, Unrestricted Access