ARM R4F, r1p3 manual Region attributes, Region access permissions, Overlapping regions

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Memory Protection Unit

Region attributes

Each region has a number of attributes associated with it. These control how a memory access is performed when the processor accesses an address that falls within a given region. The attributes are:

Memory Type, one of:

Strongly Ordered

Device

Normal

Shared or Non-shared

Non-cacheable

Write-through Cacheable

Write-back Cacheable

Read allocation

Write allocation.

See Memory types on page 7-7for more information about memory types, and Region attributes on page 7-9for a description of how to assign types and attributes to a region.

Region access permissions

Each region can be given no access, read-only access, or read/write access permissions for Privileged or all modes. In addition, each region can be marked as eXecute Never (XN) to prevent instructions being fetched from that region.

For example, if a User mode application attempts to access a Privileged mode access only region a permission fault occurs.

The ARM architecture uses constants known as inline literals to perform address calculations. The assembler and compiler automatically generate these constants and they are stored inline with the instruction code. To ensure correct operation, only a memory region that has permission for data read access can execute instructions. For more information, see the ARM Architecture Reference Manual. For information about how to program access permissions, see Table 4-34on page 4-52.

Instructions cannot be executed from regions with Device or Strongly-Ordered memory type attributes. The processor treats such regions as if they have XN permissions.

7.1.2Overlapping regions

You can program the MPU with two or more overlapping regions. For overlapping regions, a fixed priority scheme determines attributes and permissions for memory access to the overlapping region. Attributes and permissions for region 11 take highest priority, those for region 0 take lowest priority. For example:

Region 2

Is 4KB in size, starting from address 0x3000. Privileged mode has full

 

access, and User mode has read-only access.

Region 1

Is 16KB in size, starting from address 0x0000. Both Privileged and User

 

modes have full access.

When the processor performs a data write to address 0x3010 while in User mode, the address falls into both region 1 and region 2, as Figure 7-1 on page 7-5shows. Because these regions have different permissions, the permissions associated with region 2 are applied. Because User mode is read access only for this region, a permission fault occurs, causing a data abort.

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ARM R4F, r1p3 manual Region attributes, Region access permissions, Overlapping regions